On the IC architecture and design of a 2 µm CMOS 8 MIPS digital signal processor with parallel processing capability: The PCB5010/5011. - Frans J. van Wijk; Frank P. Welten; Jef L. van Meerbergen; Jan Stoter; Jos A. Huisken; Antoine Delaruelle; Karel E. van Eerdewijk; Josef Schmid; Jan H. Wittek (ICASSP, 1986)

Synthesis of delay functions in DSP compilers. - Antoine Delaruelle; O. McArdle; Jef L. van Meerbergen; Cees Niessen (EURO-DAC, 1990)

Synthesis of synchronous communication hardware in a multiprocessor architecture. - Jos Huisken; Antoine Delaruelle; B. Egberts; P. Eeckhout; Jef L. van Meerbergen (J. VLSI Signal Process., 1993)