Properties of code with summation for logical circuit test organization. - Anton A. Blyudov; Dmitry V. Efanov; Valery V. Sapozhnikov; Vladimir V. Sapozhnikov (EWDTS, 2013)

On the problem of selection of code with summation for combinational circuit test organization. - Dmitry V. Efanov; Valery V. Sapozhnikov; Vladimir V. Sapozhnikov; Anton A. Blyudov (EWDTS, 2013)

Analysis of error-detection possibilities of CED circuits based on Hamming and Berger codes. - Valery V. Sapozhnikov; Vladimir V. Sapozhnikov; Dmitry V. Efanov; Anton A. Blyudov (EWDTS, 2013)

Summation codes for organization of control of combinational circuits. - Anton A. Blyudov; Dmitry V. Efanov; Valery V. Sapozhnikov; Vladimir V. Sapozhnikov (Autom. Remote. Control., 2013)

On the synthesis of unidirectional combinational circuits detecting all single faults. - Vladimir V. Sapozhnikov; Valery V. Sapozhnikov; Dmitry V. Efanov; Anton A. Blyudov (EWDTS, 2014)

On codes with summation of data bits in concurrent error detection systems. - Anton A. Blyudov; Dmitry V. Efanov; Valery V. Sapozhnikov; Vladimir V. Sapozhnikov (Autom. Remote. Control., 2014)

Combinational circuit check by boolean complement method based on "1-out-of-5" code. - Valery V. Sapozhnikov; Vladimir V. Sapozhnikov; Dmitry V. Efanov; Anton A. Blyudov; Dmitry V. Pivovarov (EWDTS, 2017)