A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications. - Paolo Rossi; Antonio Liscidini; Massimo Brandolini; Francesco Svelto (IEEE J. Solid State Circuits, 2005)

Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End. - Antonio Liscidini; Cesare Ghezzi; Emanuele Depaoli; Guido Albasini; Ivan Bietti; Rinaldo Castello (CICC, 2006)

A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO. - Antonio Liscidini; Andrea Mazzanti; Riccardo Tonietto; Luca Vandi; Pietro Andreani; Rinaldo Castello (ISSCC, 2006)

A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier. - Antonio Liscidini; Massimo Brandolini; Davide Sanzogni; Rinaldo Castello (IEEE J. Solid State Circuits, 2006)

Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell. - Antonio Liscidini; Andrea Mazzanti; Riccardo Tonietto; Luca Vandi; Pietro Andreani; Rinaldo Castello (IEEE J. Solid State Circuits, 2006)

A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer. - Marika Tedeschi; Antonio Liscidini; Rinaldo Castello (ESSCIRC, 2008)

A 2.4 GHz 3.6mW 0.35mm2 Quadrature Front-End RX for ZigBee and WPAN Applications. - Antonio Liscidini; Marika Tedeschi; Rinaldo Castello (ISSCC, 2008)

Analysis and Design of Configurable LNAs in Feedback Common-Gate Topologies. - Antonio Liscidini; Giuseppe Martini; Daniele Mastantuono; Rinaldo Castello (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Time to digital converter based on a 2-dimensions Vernier architecture. - Antonio Liscidini; Luca Vercesi; Rinaldo Castello (CICC, 2009)

A 1.25mW 75dB-SFDR CT filter with in-band noise reduction. - Antonio Liscidini; Alberto Pirola; Rinaldo Castello (ISSCC, 2009)

3.3GHz DCO with a frequency resolution of 150Hz for All-digital PLL. - Luca Fanori; Antonio Liscidini; Rinaldo Castello (ISSCC, 2010)

Capacitive Degeneration in LC-Tank Oscillator for DCO Fine-Frequency Tuning. - Luca Fanori; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2010)

Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping. - Alberto Pirola; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2010)

Low-Power Quadrature Receivers for ZigBee (IEEE 802.15.4) Applications. - Marika Tedeschi; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2010)

Two-Dimensions Vernier Time-to-Digital Converter. - Luca Vercesi; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2010)

A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs. - Ping Lu 002; Pietro Andreani; Antonio Liscidini (ESSCIRC, 2011)

A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC. - Marco Sosio; Antonio Liscidini; Rinaldo Castello; Fernando De Bernardinis (ESSCIRC, 2011)

Corrections to "Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping" [Sep 10 1770-1780]. - Alberto Pirola; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2011)

A 6.7-to-9.2GHz 55nm CMOS hybrid Class-B/Class-C cellular TX VCO. - Luca Fanori; Antonio Liscidini; Pietro Andreani (ISSCC, 2012)

A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers. - Antonio Liscidini; Luca Fanori; Pietro Andreani; Rinaldo Castello (ISSCC, 2012)

A 90nm CMOS gated-ring-oscillator-based 2-dimension Vernier time-to-digital converter. - Ping Lu 002; Pietro Andreani; Antonio Liscidini (NORCHIP, 2012)

Clock/Frequency Generation Circuits and Systems. - Woogeun Rhee; Antonio Liscidini; Jae-Yoon Sim; Kenichi Okada 001; Sudhakar Pamarti (J. Electr. Comput. Eng., 2012)

A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps. - Ping Lu 002; Antonio Liscidini; Pietro Andreani (IEEE J. Solid State Circuits, 2012)

A Dither-Less All Digital PLL for Cellular Transmitters. - Luca Vercesi; Luca Fanori; Fernando De Bernardinis; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2012)

A 2G/3G Cellular Analog Baseband Based on a Filtering ADC. - Marco Sosio; Antonio Liscidini; Rinaldo Castello (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

A low out-of-band noise LTE transmitter with current-mode approach. - Nicola Codega; Antonio Liscidini; Rinaldo Castello (ESSCIRC, 2013)

F5: Frequency generation and clock distribution. - Antonio Liscidini; SeongHwan Cho; Tony Chan Carusone; Tanay Karnik; Mike Keaveney; Brian Otis; Aaron Partridge; Christoph Sandner (ISSCC, 2013)

An LTE transmitter using a class-A/B power mixer. - Paolo Rossi; Nicola Codega; Danilo Gerna; Antonio Liscidini; Daniele Ottini; Yong He; Alberto Pirola; Enrico Sacchi; Gregory Uehara; Chao Yang; Rinaldo Castello (ISSCC, 2013)

SAW-Less Analog Front-End Receivers for TDD and FDD. - Ivan Fabiano; Marco Sosio; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2013)

Introduction to the Special Issue on the 38th European Solid-State Circuits Conference (ESSCIRC). - Antonio Liscidini; Douglas Smith (IEEE J. Solid State Circuits, 2013)

An Intuitive Current-Driven Passive Mixer Model Based on Switched-Capacitor Theory. - Marco Sosio; Antonio Liscidini; Rinaldo Castello (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A Current-Mode, Low Out-of-Band Noise LTE Transmitter With a Class-A/B Power Mixer. - Nicola Codega; Paolo Rossi; Alberto Pirola; Antonio Liscidini; Rinaldo Castello (IEEE J. Solid State Circuits, 2014)

An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators. - Marco Garampazzi; Stefano Dal Toso; Antonio Liscidini; Danilo Manstretta; P. Mendez; Luca Romanò; Rinaldo Castello (IEEE J. Solid State Circuits, 2014)

A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers. - Antonio Liscidini; Luca Fanori; Pietro Andreani; Rinaldo Castello (IEEE J. Solid State Circuits, 2014)

A current re-use PA-VCO cell for low-power BLE transmitters. - Chuanwei Li; Antonio Liscidini (ESSCIRC, 2015)

Bluetooth low energy receiver system design. - Alessandra Pipino; Antonio Liscidini; Karen Wan; Andrea Baschirotto (ISCAS, 2015)

13.6 A 600μW Bluetooth low-energy front-end receiver in 0.13μm CMOS technology. - Anith Selvakumar; Meysam Zargham; Antonio Liscidini (ISSCC, 2015)

Sub-mW Current Re-Use Receiver Front-End for Wireless Sensor Network Applications. - Anith Selvakumar; Meysam Zargham; Antonio Liscidini (IEEE J. Solid State Circuits, 2015)

Current-Recycling Complex Filter for Bluetooth-Low-Energy Applications. - Anith Selvakumar; Antonio Liscidini (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

20.9 A 1.92mW filtering transimpedance amplifier for RF current passive mixers. - Tian Ya Liu; Antonio Liscidini (ISSCC, 2016)

Class-C PA-VCO Cell for FSK and GFSK Transmitters. - Chuanwei Li; Antonio Liscidini (IEEE J. Solid State Circuits, 2016)

Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. - Edgar Sánchez-Sinencio; Jan Mulder; Antonio Liscidini; Eric A. M. Klumperink; Elad Alon (IEEE J. Solid State Circuits, 2016)

A Simplified Model for Passive-Switched-Capacitor Filters With Complex Poles. - Sevil Zeynep Lulec; David A. Johns; Antonio Liscidini (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A LTE RX front-end with digitally programmable multi-band blocker cancellation in 28nm CMOS. - Qiwei Wang; Hajime Shibata; Anthony Chan Carusone; Antonio Liscidini (CICC, 2017)

F4: Wireless low-power transceivers for local and wide-area networks. - Jan van Sinderen; Danielle Griffith; Ken Yamamoto; Antonio Liscidini; Young-sub Yuk (ISSCC, 2017)

Filtering ADCs for wireless receivers: A survey. - Qiwei Wang; Antonio Liscidini; Anthony Chan Carusone (MWSCAS, 2017)

A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance. - Zhonghong Jiang; David A. Johns; Antonio Liscidini (CICC, 2018)

Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier. - Zexi Ji; Saba Zargham; Antonio Liscidini (ESSCIRC, 2018)

Quantized Analog RX Front-End for SAW-Less Applications. - Javid Musayev; Antonio Liscidini (ESSCIRC, 2018)

A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers. - Qiwei Wang; Hajime Shibata; Antonio Liscidini; Anthony Chan Carusone (IEEE J. Solid State Circuits, 2018)

A Quantized Analog RF Front End. - Javid Musayev; Antonio Liscidini (IEEE J. Solid State Circuits, 2019)

A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach. - Sevil Zeynep Lulec; David A. Johns; Antonio Liscidini (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Temperature Compensation of Crystal References in NB-IoT Modems. - Tuomas Haapala; Antonio Liscidini; Kari A. I. Halonen (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A 2.4-GHz 1.3-mW OQPSK RF Front-End TX Based on an Injection-Locked Power Amplifier. - Saba Zargham; Zexi Ji; Antonio Liscidini (IEEE J. Solid State Circuits, 2021)

A 2GHz voltage mode power scalable RF-Front-End with 2.5dB-NF and 0.5dBm-1dBCP. - Justin Yonghui Kim; Antonio Liscidini (CICC, 2022)

Optimization of Quantized Analog Signal Processing Using Genetic Algorithms and μ-Law. - Qingnan Yu; Tony Chan Carusone; Antonio Liscidini (IEEE Open J. Circuits Syst., 2022)

A 22nm 56TOPS/W 6/8-bit Linearly-scalable R-2R Multiply-and-Accumulate Architecture with 2.2ns Latency. - Tianwen Tang; Antonio Liscidini (ESSCIRC, 2023)

A 36 GHz Bandwidth, High Linear, Low Power, Driver Modulator, in 28 nm CMOS Technology Based on Quantized-Analog Signal Processing. - Xhulio Selmani; Gurjeet Singh; Rinaldo Castello; Antonio Liscidini (ISCAS, 2023)

A Wide Bandwidth, Low Power, Linear Quantized-Analog VGA in 28 nm CMOS Technology and 1.2V Supply. - Gurjeet Singh; Xhulio Selmani; Rinaldo Castello; Antonio Liscidini (PRIME, 2023)

4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOI. - John Zhong; Konstantinos Vasilakopoulos; Antonio Liscidini (ISSCC, 2024)

Guest Editorial Special Issue on the 2024 IEEE International Symposium on Circuits and Systems. - Edoardo Bonizzoni; Sebastian Hoyos; Antonio Liscidini (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

DC-Coupled Biasing Technique for Quantized-Analog Amplifiers. - Armin Choopani; Antonio Liscidini (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Guest Editorial Special Issue on the 2024 ISICAS: A CAS Journal Track Symposium. - Antonio Liscidini (IEEE Trans. Circuits Syst. II Express Briefs, 2024)