A survey of GaAs computer designs. - Antonio Núñez (Microprocess. Microprogramming, 1987)

MVM: A GaAs microprocessor for critical real-time applications. - Antonio Núñez; David Carnal (Microprocessing and Microprogramming, 1989)

Some results in GaAs processor design using LSI integrated circuits. - Antonio Núñez; Roberto Sarmiento; Pedro P. Carballo (Microprocess. Microprogramming, 1989)

Speed-area-power optimization for DCFL and SDCFL class of logic using ring notation. - K. Eshraghian; Roberto Sarmiento; Pedro P. Carballo; Antonio Núñez (Microprocessing and Microprogramming, 1991)

Accurate extraction of interconnect capacitances by adaptive mixed F.E.M. - Luis Ferragut; Rafael Montenegro; G. Winter; Antonio Núñez (Microprocessing and Microprogramming, 1991)

Program chairman's introduction. - Antonio Núñez (Microprocessing and Microprogramming, 1991)

Timimg model for SDCFL digital circuits. - Luis Gómez 001; Antonio Hernández; Antonio Núñez (Microprocess. Microprogramming, 1992)

GASTIM: A timing analyzer for GaAs digital circuits. - Antonio Hernández; Luis Gómez 001; Antonio Núñez (EURO-DAC, 1993)

Using the ES2 library and SILOS simulator in the development of a single chip with three processors and analog IO. - Juan A. Montiel-Nelson; Valentin de Armas; D. Q. M. Fay; Antonio Núñez (PDP, 1993)

Integer and control units for a GaAs 32-bit RISC processor. - Pedro P. Carballo; Roberto Sarmiento; Antonio Núñez (Microprocess. Microprogramming, 1993)

Multiobjective optimization using analytical models of GaAs high-speed digital circuits. - Luis Gómez 001; Antonio Hernández; Antonio Núñez (Microprocess. Microprogramming, 1993)

Timing analysis for DCFL/SDCFL VLSI circuits. - Luis Gómez 001; Antonio Hernández; Antonio Núñez (Microprocess. Microprogramming, 1993)

An empirical model to estimate power consumption in GaAs DCFL/SDCFL circuits. - Antonio Hernández; Luis Gómez 001; Antonio Núñez (Microprocess. Microprogramming, 1993)

Letter from the short notes editors, Euromicro '92. - Antonio Núñez; Don Fay (Microprocess. Microprogramming, 1993)

GaAs pseudodynamic latched logic for high performance processor cores. - José Francisco López; Kamran Eshraghian; Roberto Sarmiento; Antonio Núñez; Derek Abbott (IEEE J. Solid State Circuits, 1997)

Noise margin enhancement in GaAs ROM's using current mode logic. - José Francisco López; Roberto Sarmiento; Kamran Eshraghian; Antonio Núñez (IEEE J. Solid State Circuits, 1997)

A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. - Juan A. Montiel-Nelson; V. de Armas; Roberto Sarmiento; Antonio Núñez (DATE, 1998)

OLYMPO: a GaAs compiler for VLSI design. - Juan A. Montiel-Nelson; Valentin de Armas; Roberto Sarmiento; Antonio Núñez (ICECS, 1998)

A CORDIC processor for FFT computation and its implementation using gallium arsenide technology. - Roberto Sarmiento; V. de Armas; José Francisco López; Juan A. Montiel-Nelson; Antonio Núñez (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Flexible design of SPARC cores: a quantitative study. - Tomás Bautista; Antonio Núñez (CODES, 1999)

High Speed GaAs Subsystem Design using Feed Through Logic. - Juan A. Montiel-Nelson; Saeid Nooshabadi; V. de Armas; Roberto Sarmiento; Antonio Núñez (DATE, 1999)

Design of Efficient SPARC Cores for Embedded Systems. - Tomás Bautista; Antonio Núñez (EUROMICRO, 1999)

Low Power Techniques for Digital GaAs VLSI. - José Francisco López; Roberto Sarmiento; Antonio Núñez; Kamran Eshraghian; Stefan Lachowicz; Derek Abbott (Great Lakes Symposium on VLSI, 1999)

A Single Phase Latch for High Speed GaAs Domino Circuits. - Saeid Nooshabadi; Juan A. Montiel-Nelson; Antonio Núñez; Roberto Sarmiento; Javier Sosa (DATE, 2000)

Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells. - Tomás Bautista; Antonio Núñez (ISQED, 2000)

A compact layout technique to minimize high frequency switching effects in high speed circuits. - Juan A. Montiel-Nelson; De de Armas; Roberto Sarmiento; Antonio Núñez; Saeid Nooshabadi (ISCAS (4), 2001)

A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits. - Juan A. Montiel-Nelson; V. de Armas; Roberto Sarmiento; Antonio Núñez (ISQED, 2001)

Quantitative study of the impact of design and synthesis options on processor core performance. - Tomás Bautista; Antonio Núñez (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Integrated Inductors Modeling and Tools for Automatic Selection and Layout Generation. - José R. Sendra; Javier del Pino; Antonio Hernández; Javier Hernández; Jaime Aguilera; Andrés Garcia-Alonso; Antonio Núñez (ISQED, 2002)

A Scalable Communication Platform for High Performance Multimedia Applications. - Víctor Reyes; Tomás Bautista; Antonio Núñez (ESTIMedia, 2003)

A core for ambient and mobile intelligent imaging applications. - Jörn Jachalsky; Martin Wahler; Peter Pirsch; S. Capperon; Winfried Gehrke; W. M. Kruijtzer; Antonio Núñez (ICME, 2003)

Low-Cost and Real-Time Super-Resolution over a Video Encoder IP. - Gustavo M. Callicó; Antonio Núñez; Rafael Peset Llopis; Ramanathan Sethuraman (ISQED, 2003)

A scalable single-chip multi-processor architecture with on-chip RTOS kernel. - Bart D. Theelen; A. C. Verschueren; V. V. Reyes Suárez; M. P. J. Stevens; Antonio Núñez (J. Syst. Archit., 2003)

A multicast inter-task communication protocol for embedded multiprocessor systems. - Víctor Reyes; Tomás Bautista; Gustavo Marrero Callicó; Antonio Núñez; Wido Kruijtzer (CODES+ISSS, 2005)

Low-cost implementation of a super-resolution algorithm for real-time video applications. - Sebastián López; Gustavo M. Callicó; José Francisco López; Roberto Sarmiento; Antonio Núñez (ISCAS (6), 2005)

A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study. - Víctor Reyes; Wido Kruijtzer; Tomás Bautista; Ghiath Alkadi; Antonio Núñez (DATE, 2006)

VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems. - Armando Sánchez-Peña; Pedro P. Carballo; Luz García 001; Antonio Núñez (DSD, 2006)

Low-Cost Super-Resolution Algorithms Implementation Over a HW/SW Video Compression Platform. - Gustavo M. Callicó; Rafael Peset Llopis; Sebastián López; José Francisco López; Antonio Núñez; Ramanathan Sethuraman; Roberto Sarmiento (EURASIP J. Adv. Signal Process., 2006)

Advances in video coding for hand-held device implementation in networked electronic media. - Antonio Núñez (J. Real Time Image Process., 2006)

Embedded Systems for Portable and Mobile Video Platforms. - Leonel Augusto Sousa; Noel E. O'Connor; Marco Mattavelli; Antonio Núñez (EURASIP J. Embed. Syst., 2007)

Towards a configurable SoC MPEG-4 advanced simple profile decoder. - Luz García 001; Gustavo M. Callicó; Dácil Barreto; Víctor Reyes; Tomás Bautista; Antonio Núñez (IET Comput. Digit. Tech., 2007)

Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC. - Zai Jian Jia; Tomás Bautista; Antonio Núñez; Cayetano Guerra; Mario Hernández (ReConFig, 2008)

Real-time visual tracking system modelling in MPSoC using platform based design. - Zai Jian Jia; Tomás Bautista; Antonio Núñez; Cayetano Guerra; Mario Hernández (Real-Time Image and Video Processing, 2009)

NASA: A generic infrastructure for system-level MP-SoC design space exploration. - Zai Jian Jia; Andy D. Pimentel; Mark Thompson 001; Tomás Bautista; Antonio Núñez (ESTIMedia, 2010)

A Low Memory Requirements Execution Flow for the Non-Uniform Grid Projection Super-Resolution Algorithm. - Tomasz Szydzik; Gustavo M. Callicó; Antonio Núñez (ISM, 2011)

Efficient FPGA implementation of a high-quality super-resolution algorithm with real-time performance. - Tomasz Szydzik; Gustavo M. Callicó; Antonio Núñez (IEEE Trans. Consumer Electron., 2011)

Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology. - Pedro P. Carballo; Omar Espino; Romén Neris; Pedro Hernandez-Fernandez; Tomasz Szydzik; Antonio Núñez (DSD, 2013)

Contributions to visualization algorithm enabling GPU-accelerated image displaying for dual panel high dynamic range LCD display. - Tomasz Szydzik; Antonio Núñez; Lode De Paepe; Luigi Albani (ISPA, 2013)

A system-level infrastructure for multidimensional MP-SoC design space co-exploration. - Zai Jian Jia; Tomás Bautista; Antonio Núñez; Andy D. Pimentel; Mark Thompson 001 (ACM Trans. Embed. Comput. Syst., 2013)

A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC. - Zai Jian Jia; Antonio Núñez; Tomás Bautista; Andy D. Pimentel (Microprocess. Microsystems, 2014)

Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm. - Adrián Domínguez; Pedro P. Carballo; Antonio Núñez (ReCoSoC, 2017)

Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs. - Raquel León; Adrián Domínguez; Pedro P. Carballo; Antonio Núñez (DCIS, 2019)