SiGe HMODFET "KAIST" micropower model and amplifier realization. - Antonio Vilches; Kristel Fobelets; Kostis Michelakis; Solon Despotopoulos; Christos Papavassiliou; Thomas Hackbarth; Ulf König (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Monolithic large-signal transimpedance amplifier for use in multi-gigabit, short-range optoelectronic interconnect applications. - Antonio Vilches; Rodney Loga; Mouhamed Rahal; Kristel Fobelets; Christos Papavassiliou; Trevor J. Hall (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A bio-implantable platform for inductive data and power transfer with integrated battery charging. - Michael Sole; Ayodele Sanni; Antonio Vilches; Christofer Toumazou; Timothy G. Constandinou (ISCAS, 2011)

Inductive and Ultrasonic Multi-Tier Interface for Low-Power, Deeply Implantable Medical Devices. - Ayodele Sanni; Antonio Vilches; Christofer Toumazou (IEEE Trans. Biomed. Circuits Syst., 2012)

Adaptive partitioning strategies for loop parallelism in heterogeneous architectures. - Angeles G. Navarro; Antonio Vilches; Rafael Asenjo; Francisco Corbera (HPCS, 2014)

Strategies for maximizing utilization on multi-CPU and multi-GPU heterogeneous architectures. - Angeles G. Navarro; Antonio Vilches; Francisco Corbera; Rafael Asenjo (J. Supercomput., 2014)

Adaptive Partitioning for Irregular Applications on Heterogeneous CPU-GPU Chips. - Antonio Vilches; Rafael Asenjo; Angeles G. Navarro; Francisco Corbera; Ruben Gran Tejero; María Jesús Garzarán (ICCS, 2015)

Pipeline Template for Streaming Applications on Heterogeneous Chips. - Andrés Rodríguez 001; Angeles G. Navarro; Rafael Asenjo; Francisco Corbera; Antonio Vilches; María Jesús Garzarán (PARCO, 2015)

Parallel Pipeline on Heterogeneous Multi-processing Architectures. - Andrés Rodríguez 001; Angeles G. Navarro; Rafael Asenjo; Antonio Vilches; Francisco Corbera; María Jesús Garzarán (TrustCom/BigDataSE/ISPA (3), 2015)

Reducing overheads of dynamic scheduling on heterogeneous chips. - Francisco Corbera; Andrés Rodríguez 001; Rafael Asenjo; Angeles G. Navarro; Antonio Vilches; María Jesús Garzarán (CoRR, 2015)

Proceedings of the Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES) 2015. - Francisco Corbera; Andrés Rodríguez 001; Rafael Asenjo; Angeles G. Navarro; Antonio Vilches; María Jesús Garzarán; Ismat Chaib Draa; Jamel Tayeb; Smaïl Niar; Mikael Desertot; Daniel Gregorek; Robert Schmidt 003; et al. (CoRR, 2015)

Mapping Streaming Applications on Commodity Multi-CPU and GPU On-Chip Processors. - Antonio Vilches; Angeles G. Navarro; Rafael Asenjo; Francisco Corbera; Ruben Gran; María Jesús Garzarán (IEEE Trans. Parallel Distributed Syst., 2016)

Heterogeneous parallel_for Template for CPU-GPU Chips. - Angeles G. Navarro; Francisco Corbera; Andrés Rodríguez 001; Antonio Vilches; Rafael Asenjo (Int. J. Parallel Program., 2019)

ScrimpCo: scalable matrix profile on commodity heterogeneous processors. - Jose Carlos Romero; Antonio Vilches; Andrés Rodríguez 001; Angeles G. Navarro; Rafael Asenjo (J. Supercomput., 2020)

Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM. - Jose Carlos Romero; Angeles G. Navarro; Antonio Vilches; Andrés Rodríguez 001; Francisco Corbera; Rafael Asenjo (Future Gener. Comput. Syst., 2021)