Delay fault testing and silicon debug using scan chains. - Ramyanshu Datta; Antony Sebastine; Jacob A. Abraham (ETS, 2004)

On-chip delay measurement for silicon debug. - Ramyanshu Datta; Antony Sebastine; Ashwin Raghunathan; Jacob A. Abraham (ACM Great Lakes Symposium on VLSI, 2004)

Tri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing. - Ramyanshu Datta; Ravi Gupta; Antony Sebastine; Jacob A. Abraham; Manuel A. d'Abreu (ITC, 2004)

Controllability of Static CMOS Circuits for Timing Characterization. - Ramyanshu Datta; Ravi Gupta; Antony Sebastine; Jacob A. Abraham; Manuel A. d'Abreu (J. Electron. Test., 2008)

On-Chip Delay Measurement Based Response Analysis for Timing Characterization. - Ramyanshu Datta; Antony Sebastine; Ashwin Raghunathan; Gary D. Carpenter; Kevin J. Nowka; Jacob A. Abraham (J. Electron. Test., 2010)