A 30 MHz DDS clock generator with sub-ns time domain interpolator and -50 dBc spurious level. - Antti Heiskanen; Antti Mäntyniemi; Timo Rahkonen (ISCAS (4), 2001)

5th order multi-tone Volterra simulator with component-level output. - Antti Heiskanen; Timo Rahkonen (ISCAS (3), 2002)

A 5th order Volterra study of a 30W LDMOS power amplifier. - Antti Heiskanen; Janne Aikio; Timo Rahkonen (ISCAS (4), 2003)

5th order electro-thermal multi-tone Volterra simulator with component-level output. - Antti Heiskanen; Timo Rahkonen (ISCAS (4), 2003)

Fitting considerations of polynomial device models [semiconductor device modeling]. - Timo Rahkonen; Antti Heiskanen (ISCAS (4), 2003)

On the second harmonic control requirements in balanced common-emitter BJT low noise amplifier. - Antti Heiskanen; Timo Rahkonen (ISCAS (1), 2004)

Comparison of two class E amplifiers for EER transmitter. - Antti Heiskanen; Timo Rahkonen (ISCAS (1), 2005)