DTR: A Defect-Tolerant Routing Algorithm. - Anucha Pitaksanonkul; Suchai Thanawastien; Chidchanok Lursinsap; J. A. Gandhi (DAC, 1989)

Bisection trees and half-quad trees: Memory and time efficient data structures for VLSI layout editors. - Anucha Pitaksanonkul; Suchai Thanawastien; Chidchanok Lursinsap (Integr., 1989)

Comparisons of quad trees and 4-D trees: new results [VLSI layout]. - Anucha Pitaksanonkul; Suchai Thanawastien; Chidchanok Lursinsap (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)