MARU: An ML-Based Framework for Area Estimation from FPGA Resource Usage. - Tarun Kholay; Anup Ashok Kedilaya; Aman Arora 001; Jaydeep P. Kulkarni; Lizy K. John (FPGA, 2026)

Metal Stack Exploration for Front- Versus Back- Side Clock and Signal Allocation for Advanced CMOS PPA Improvements. - Nishant Gupta; Sirish Oruganti; S. S. Teja Nibhanupudi; Anup Ashok Kedilaya; Xiuhao Zhang; Jaydeep P. Kulkarni (IEEE Trans. Very Large Scale Integr. Syst., 2026)