Anup Das

According to our database1, Anup Das authored at least 42 papers between 2010 and 2018.

Collaborative distances :
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

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Bibliography

2018
Energy-Efficient Mapping of LTE-A PHY Signal Processing Tasks on Microservers.
TGCN, 2018

Unsupervised heart-rate estimation in wearables with Liquid states and a probabilistic readout.
Neural Networks, 2018

Dataflow-Based Mapping of Spiking Neural Networks on Neuromorphic Hardware.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Mapping of local and global synapses on spiking neuromorphic hardware.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

VRL-DRAM: improving DRAM performance via variable refresh latency.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Unsupervised Heart-rate Estimation in Wearables With Liquid States and A Probabilistic Readout.
CoRR, 2017

2016
Reliability and Energy-Aware Mapping and Scheduling of Multimedia Applications on Multiprocessor Systems.
IEEE Trans. Parallel Distrib. Syst., 2016

Adaptive and Hierarchical Runtime Manager for Energy-Aware Thermal Management of Embedded Systems.
ACM Trans. Embedded Comput. Syst., 2016

Learning Transfer-Based Adaptive Energy Minimization in Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Hibernus++: A Self-Calibrating and Adaptive System for Transiently-Powered Embedded Devices.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Graceful Performance Modulation for Power-Neutral Transient Computing Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Workload Change Point Detection for Runtime Thermal Management of Embedded Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

The slowdown or race-to-idle question: Workload-aware energy optimization of SMT multicore platforms under process variation.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Autonomous Soft-Error Tolerance of FPGA Configuration Bits.
TRETS, 2015

Execution Trace-Driven Energy-Reliability Optimization for Multimedia MPSoCs.
TRETS, 2015

Approaches to Transient Computing for Energy Harvesting Systems: A Quantitative Evaluation.
Proceedings of the 3rd International Workshop on Energy Harvesting & Energy Neutral Sensing Systems, 2015

Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Adaptive Energy Minimization of OpenMP Parallel Applications on Many-Core Systems.
Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2015

Workload uncertainty characterization and adaptive frequency scaling for energy minimization of embedded systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Energy-aware task mapping and scheduling for reliable embedded computing systems.
ACM Trans. Embedded Comput. Syst., 2014

Communication and migration energy aware task mapping for reliable multiprocessor systems.
Future Generation Comp. Syst., 2014

A bit-interleaved embedded hamming scheme to correct single-bit and multi-bit upsets for SRAM-based FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Criticality-aware scrubbing mechanism for SRAM-based FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Artificial intelligence based task mapping and pipelined scheduling for checkpointing on real time systems with imperfect fault detection.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Temperature aware energy-reliability trade-offs for mapping of throughput-constrained applications on multimedia MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Reinforcement Learning-Based Inter- and Intra-Application Thermal Optimization for Lifetime Improvement of Multicore Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Improving autonomous soft-error tolerance of FPGA through LUT configuration bit manipulation.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

RAPIDITAS: RAPId Design-Space-Exploration Incorporating Trace-Based Analysis and Simulation.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Run-time mapping for reliable many-cores based on energy/performance trade-offs.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Communication and migration energy aware design space exploration for multicore systems with intermittent faults.
Proceedings of the Design, Automation and Test in Europe, 2013

Reliability-driven task mapping for lifetime extension of networks-on-chip based multiprocessor systems.
Proceedings of the Design, Automation and Test in Europe, 2013

Energy optimization by exploiting execution slacks in streaming applications on multiprocessor systems.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems.
Proceedings of the International Conference on Compilers, 2013

2012
A design flow for partially reconfigurable heterogeneous multi-processor platforms.
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012

Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs.
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012

Fault-tolerant network interface for spatial division multiplexing based Network-on-Chip.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Energy-Aware Communication and Remapping of Tasks for Reliable Multimedia Multiprocessor Systems.
Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

Minimizing Power Consumption of Spatial Division Based Networks-on-Chip Using Multi-path and Frequency Reduction.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2010
A study on performance benefits of core morphing in an asymmetric multicore processor.
Proceedings of the 28th International Conference on Computer Design, 2010


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