Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (ASAP, 2004)

Factoring and eliminating common subexpressions in polynomial expressions. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (ICCAD, 2004)

Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (ASP-DAC, 2005)

Energy Efficient Hardware Synthesis of Polynomial Expressions. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (VLSI Design, 2005)

Optimizing high speed arithmetic circuits using three-term extraction. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (DATE, 2006)

High speed FIR filter implementation using add and shift method. - Shahnam Mirzaei; Anup Hosangadi; Ryan Kastner (FPGA, 2006)

FPGA Implementation of High Speed FIR Filters Using Add and Shift Method. - Shahnam Mirzaei; Anup Hosangadi; Ryan Kastner (ICCD, 2006)

Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Algebraic Methods for Optimizing Constant Multiplications in Linear Systems. - Anup Hosangadi; Farzan Fallah; Ryan Kastner (J. VLSI Signal Process., 2007)

Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs. - Shahnam Mirzaei; Ryan Kastner; Anup Hosangadi (Int. J. Reconfigurable Comput., 2010)