Single Electron Tunneling Based Threshold Logic Unit. - Anup Kumar Biswas (CICBA (2), 2023)

Reducing Transistor Count in CMOS Logic Design Through Clustering and Library-Independent Multiple-Output Logic Synthesis. - Anup Kumar Biswas; Dimitri Kagaris (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)