A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors. - Fabian Klass; Chaim Amir; Ashutosh Das; Kathirgamar Aingaran; Cindy Truong; Richard Wang; Anup Mehta; Raymond A. Heald; Gin Yee (IEEE J. Solid State Circuits, 1999)

A third-generation SPARC V9 64-b microprocessor. - Raymond A. Heald; Kathirgamar Aingaran; Chaim Amir; Michael Ang; Michael Boland; Pankaj Dixit; Gary Gouldsberry; Dale Greenley; Joel Grinberg; Jason M. Hart; Tim Horel; Wen-Jay Hsu; et al. (IEEE J. Solid State Circuits, 2000)

A 2GHz, 7W (max) 64b PowerTM Microprocessor Core. - Daniel Murray; James Burnette; Brian Campbell 004; Mark Chung; Bruce Fernandes; Subhendra Ghosh; Rajat Goel; Greg Hess; Hang Huang; Zhibin Huang; Naveen Javarappa; Pradeep Kanapathipillai; et al. (CICC, 2007)

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems. - Zongjian Chen; Priya Ananthanarayanan; Sukalp Biswas; Brian Campbell 004; Hao Chen; Shaishav Desai; Dominic Go; Rajat Goel; Vincent von Kaenel; Jason Kassoff; Fabian Klass; Weichun Ku; et al. (ISSCC, 2007)