S2CBench: Synthesizable SystemC Benchmark Suite for High-Level Synthesis. - Benjamin Carrión Schäfer; Anushree Mahapatra (IEEE Embed. Syst. Lett., 2014)

Accelerating cycle-accurate system-level simulations through behavioral templates. - Anushree Mahapatra; Yidi Liu; Benjamin Carrión Schäfer (Integr., 2018)

Optimizing RTL to C Abstraction Methodologies to Improve HLS Design Space Exploration. - Anushree Mahapatra; Benjamin Carrión Schäfer (ISCAS, 2019)

VeriIntel2C: Abstracting RTL to C to maximize High-Level Synthesis Design Space Exploration. - Anushree Mahapatra; Benjamin Carrión Schäfer (Integr., 2019)

Design space exploration of heterogeneous MPSoCs with variable number of hardware accelerators. - Siyuan Xu; Shuangnan Liu; Yidi Liu; Anushree Mahapatra; Monica Villaverde; Félix Moreno; Benjamin Carrión Schäfer (Microprocess. Microsystems, 2019)

Hardware Performance Counters: Ready-Made vs Tailor-Made. - Abraham Peedikayil Kuruvila; Anushree Mahapatra; Ramesh Karri; Kanad Basu (ACM Trans. Embed. Comput. Syst., 2021)

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes. - Animesh Basak Chowdhury; Anushree Mahapatra; Deepraj Soni; Ramesh Karri (CoRR, 2022)

A Golden-Free Approach to Detect Trojans in COTS Multi-PCB Systems. - Animesh Basak Chowdhury; Anushree Mahapatra; Yang Liu; Prashanth Krishnamurthy; Farshad Khorrami; Ramesh Karri (IEEE Micro, 2023)

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Postquantum Signature Schemes. - Animesh Basak Chowdhury; Anushree Mahapatra; Deepraj Soni; Ramesh Karri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)