Rate-efficient error robustness for IDR frames through edge-based redundancy maps. - Aojie Jiang; Dimitris Agrafiotis (ICIP, 2013)

Live Demonstration: An Efficient Neural Network Processor with Reduced Data Transmission and On-chip Shortcut Mapping. - Yichuan Bai; Zhuang Shao; Chenshuo Zhang; Aojie Jiang; Yuan Du; Li Du (AICAS, 2023)

GroupQ: Group-Wise Quantization With Multi-Objective Optimization for CNN Accelerators. - Aojie Jiang; Li Du; Yuan Du (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A Compilation Framework for SRAM Computing-in-Memory Systems With Optimized Weight Mapping and Error Correction. - Yichuan Bai; Yaqing Li; Heng Zhang 024; Aojie Jiang; Yuan Du; Li Du (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)