Thermal Characterization of Test Techniques for FinFET and 3D Integrated Circuits. - Aoxiang Tang; Niraj K. Jha (ACM J. Emerg. Technol. Comput. Syst., 2013)

Design space exploration of FinFET cache. - Aoxiang Tang; Niraj K. Jha (ACM J. Emerg. Technol. Comput. Syst., 2013)

McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations. - Aoxiang Tang; Yang Yang; Chun-Yi Lee; Niraj K. Jha (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Delay/Power Modeling and Optimization of FinFET Circuit Modules under PVT Variations: Observing the Trends between the 22nm and 14nm Technology Nodes. - Aoxiang Tang; Xun Gao; Lung-Yen Chen; Niraj K. Jha (ACM J. Emerg. Technol. Comput. Syst., 2016)

GenFin: Genetic Algorithm-Based Multiobjective Statistical Logic Circuit Optimization Using Incremental Statistical Analysis. - Aoxiang Tang; Niraj K. Jha (IEEE Trans. Very Large Scale Integr. Syst., 2016)