VLSI Architecture Design Methodology for Deep learning based Upper Limb and Lower Limb Movement Classification for Rehabilitation Application. - Anagha Nimbekar; Y. V. Sai Dinesh; Arvind Gautam; Vidhumouli Hunsigida; Appa Rao Nali; Amit Acharyya (LASCAS, 2022)

Low complex Hardware Architecture Design Methodology for Cubic Spline Interpolation Technique for Assistive Technologies. - Ganesh Cheduluri; Swati Bhardwaj 001; Ganesh R. Naik; Vidhumouli Hansigida; Appa Rao Nali; Amit Acharyya (NEWCAS, 2022)

Low Complex CORDIC-based Hand Movement Recognition Design Methodology for Rehabilitation and Prosthetic Applications. - Swati Bhardwaj 001; Diptasri Ghosh; Debeshi Dutta; Ganesh Cheduluri; Vidhumauli Hansigida; Appa Rao Nali; Amit Acharyya (EMBC, 2023)

Reconfigurable VLSI Design Architecture for Deep Learning Established Forelimb and Hindlimb Gesture Recognition for Rehabilitation Application. - Anagha Nimbekar; Y. V. Sai Dinesh; Arvind Gautam; Vidhumouli Hunsigida; Appa Rao Nali; Amit Acharyya (IEEE Access, 2023)

Hardware-Aware Network Adaptation using Width and Depth Shrinking including Convolutional and Fully Connected Layer Merging. - Pratibha Verma; Tarun Gupta; Pabitra Das; Appa Rao Nali; Vidhumouli Hunsigida; Amit Acharyya (SOCC, 2024)

Digital Twin Assisted Performance Aware Power Management for FPGA MPSoC using High Speed Reinforcement Learning. - Kartik Laad; Ratnala Vinay; Parveen Nisha; Vidhumouli Hunsigida; Appa Rao Nali; Amit Acharyya (ISCAS, 2025)