An efficient VLSI architecture of QPP interleaver/deinterleaver for LTE turbo coding. - Arash Ardakani; Mojtaba Mahdavi; Mahdi Shabany (ISCAS, 2013)

An efficient max-log MAP algorithm for VLSI implementation of turbo decoders. - Arash Ardakani; Mahdi Shabany (ISCAS, 2015)

A Novel Area-Efficient VLSI Architecture for Recursion Computation in LTE Turbo Decoders. - Arash Ardakani; Mahdi Shabany (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Hardware implementation of FIR/IIR digital filters using integral stochastic computation. - Arash Ardakani; François Leduc-Primeau; Warren J. Gross (ICASSP, 2016)

VLSI implementation of deep neural networks using integral stochastic computing. - Arash Ardakani; François Leduc-Primeau; Naoya Onizawa; Takahiro Hanyu; Warren J. Gross (ISTC, 2016)

Stochastic Computing Can Improve Upon Digital Spiking Neural Networks. - Sean C. Smithson; Kaushik Boga; Arash Ardakani; Brett H. Meyer; Warren J. Gross (SiPS, 2016)

Activation pruning of deep convolutional neural networks. - Arash Ardakani; Carlo Condo; Warren J. Gross (GlobalSIP, 2017)

Sparsely-Connected Neural Networks: Towards Efficient VLSI Implementation of Deep Neural Networks. - Arash Ardakani; Carlo Condo; Warren J. Gross (ICLR (Poster), 2017)

A low-complexity fully scalable interleaver/address generator based on a novel property of QPP interleavers. - Arash Ardakani; Mahdi Shabany (ISCAS, 2017)

Multi-Mode Inference Engine for Convolutional Neural Networks. - Arash Ardakani; Carlo Condo; Warren J. Gross (CoRR, 2017)

VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing. - Arash Ardakani; François Leduc-Primeau; Naoya Onizawa; Takahiro Hanyu; Warren J. Gross (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Convolutional Accelerator for Neural Networks With Binary Weights. - Arash Ardakani; Carlo Condo; Warren J. Gross (ISCAS, 2018)

A Multi-Mode Accelerator for Pruned Deep Neural Networks. - Arash Ardakani; Carlo Condo; Warren J. Gross (NEWCAS, 2018)

An Architecture to Accelerate Convolution in Deep Neural Networks. - Arash Ardakani; Carlo Condo; Mehdi Ahmadi; Warren J. Gross (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Learning to Skip Ineffectual Recurrent Computations in LSTMs. - Arash Ardakani; Zhengyun Ji; Warren J. Gross (DATE, 2019)

Learning Recurrent Binary/Ternary Weights. - Arash Ardakani; Zhengyun Ji; Sean C. Smithson; Brett H. Meyer; Warren J. Gross (ICLR (Poster), 2019)

The Synthesis of XNOR Recurrent Neural Networks with Stochastic Logic. - Arash Ardakani; Zhengyun Ji; Amir Ardakani; Warren J. Gross (NeurIPS, 2019)

Design and Implementation of a Polar Codes Blind Detection Scheme. - Carlo Condo; Seyyed Ali Hashemi; Arash Ardakani; Furkan Ercan; Warren J. Gross (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A Regression-Based Method to Synthesize Complex Arithmetic Computations on Stochastic Streams. - Arash Ardakani; Amir Ardakani; Warren J. Gross (ISCAS, 2020)

Training Linear Finite-State Machines. - Arash Ardakani; Amir Ardakani; Warren J. Gross (NeurIPS, 2020)

Fast and Efficient Convolutional Accelerator for Edge Computing. - Arash Ardakani; Carlo Condo; Warren J. Gross (IEEE Trans. Computers, 2020)

Fault-Tolerance of Binarized and Stochastic Computing-based Neural Networks. - Amir Ardakani; Arash Ardakani; Warren J. Gross (SiPS, 2021)

Training Binarized Neural Networks Using Ternary Multipliers. - Amir Ardakani; Arash Ardakani; Warren J. Gross (IEEE Des. Test, 2021)

Hardware-Aware Design for Edge Intelligence. - Warren J. Gross; Brett H. Meyer; Arash Ardakani (IEEE Open J. Circuits Syst., 2021)

Partially-Random Initialization: A Smoking Gun for Binarization Hypothesis of BERT. - Arash Ardakani (EMNLP (Findings), 2022)

Standard Deviation-Based Quantization for Deep Neural Networks. - Amir Ardakani; Arash Ardakani; Brett H. Meyer; James J. Clark; Warren J. Gross (CoRR, 2022)

Late Breaking Results: Differential and Massively Parallel Sampling of SAT Formulas. - Arash Ardakani; Minwoo Kang; Kevin He; Vighnesh M. Iyer; Suhong Moon; John Wawrzynek (DAC, 2024)

SlimFit: Memory-Efficient Fine-Tuning of Transformer-based Models Using Training Dynamics. - Arash Ardakani; Altan Haan; Shangyin Tan; Doru-Thom Popovici; Alvin Cheung; Costin Iancu; Koushik Sen (NAACL-HLT, 2024)

DEMOTIC: A Differentiable Sampler for Multi-Level Digital Circuits. - Arash Ardakani; Minwoo Kang; Kevin He; Qijing Huang 001; Vighnesh M. Iyer; Suhong Moon; John Wawrzynek (ASP-DAC, 2025)

High-Throughput SAT Sampling. - Arash Ardakani; Minwoo Kang; Kevin He; Qijing Huang 001; John Wawrzynek (DATE, 2025)

Recurrent CircuitSAT Sampling for Sequential Circuits. - Arash Ardakani; Kevin He; John Wawrzynek (CoRR, 2025)