SEERAD: A high speed yet energy-efficient rounding-based approximate divider. - Reza Zendegani; Mehdi Kamal; Arash Fayyazi; Ali Afzali-Kusha; Saeed Safari; Massoud Pedram (DATE, 2016)

SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application. - Arash Fayyazi; Souvik Kundu 002; Shahin Nazarian; Peter A. Beerel; Massoud Pedram (CoRR, 2018)

An Ultra Low-Power Memristive Neuromorphic Circuit for Internet of Things Smart Sensors. - Arash Fayyazi; Mohammad Ansari; Mehdi Kamal; Ali Afzali-Kusha; Massoud Pedram (IEEE Internet Things J., 2018)

PHAX: Physical Characteristics Aware Ex-Situ Training Framework for Inverter-Based Memristive Neuromorphic Circuits. - Mohammad Ansari; Arash Fayyazi; Ali BanaGozar; Mohammad Ali Maleki; Mehdi Kamal; Ali Afzali-Kusha; Massoud Pedram (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Deep Learning-Based Circuit Recognition Using Sparse Mapping and Level-Dependent Decaying Sum Circuit Representations. - Arash Fayyazi; Soheil Shababi; Pierluigi Nuzzo 002; Shahin Nazarian; Massoud Pedram (DATE, 2019)

A Hybrid Framework for Functional Verification using Reinforcement Learning and Deep Learning. - Karunveer Singh; Rishabh Gupta; Vikram Gupta; Arash Fayyazi; Massoud Pedram; Shahin Nazarian (ACM Great Lakes Symposium on VLSI, 2019)

qCG: A Low-Power Multi-Domain SFQ Logic Design and Verification Framework. - Shahin Nazarian; Arash Fayyazi; Massoud Pedram (ICCD, 2019)

VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology. - Alvin D. Wong; Kevin Su; Hang Sun; Arash Fayyazi; Massoud Pedram; Shahin Nazarian (ISQED, 2019)

CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity. - Arash Fayyazi; Souvik Kundu 002; Shahin Nazarian; Peter A. Beerel; Massoud Pedram (ISVLSI, 2019)

OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits. - Mohammad Ansari; Arash Fayyazi; Mehdi Kamal; Ali Afzali-Kusha; Massoud Pedram (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning. - Mahdi Nazemi; Amirhossein Esmaili; Arash Fayyazi; Massoud Pedram (ICCAD, 2020)

HIPE-MAGIC: a technology-aware synthesis and mapping flow for highly parallel execution of memristor-aided LoGIC. - Arash Fayyazi; Amirhossein Esmaili; Massoud Pedram (ISLPED, 2020)

Logic Verification of Ultra-Deep Pipelined Beyond-CMOS Technologies. - Arash Fayyazi; Shahin Nazarian; Massoud Pedram (CoRR, 2020)

ESPRESSO-GPU: Blazingly Fast Two-Level Logic Minimization. - Hitarth Kanakia; Mahdi Nazemi; Arash Fayyazi; Massoud Pedram (DATE, 2021)

NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic. - Mahdi Nazemi; Arash Fayyazi; Amirhossein Esmaili; Atharva Khare; Soheil Nazar Shahsavani; Massoud Pedram (FCCM, 2021)

qMC: A Formal Model Checking Verification Framework For Superconducting Logic. - Mustafa Munir; Aswin Gopikanna; Arash Fayyazi; Massoud Pedram; Shahin Nazarian (ACM Great Lakes Symposium on VLSI, 2021)

Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators. - Jung Hwan Heo; Arash Fayyazi; Amirhossein Esmaili; Massoud Pedram (ISLPED, 2022)

Have your QEC and Bandwidth too!: A lightweight cryogenic decoder for common / trivial errors, and efficient bandwidth + execution management otherwise. - Gokul Subramanian Ravi; Jonathan M. Baker; Arash Fayyazi; Sophia Fuhui Lin; Ali Javadi-Abhari; Massoud Pedram; Frederic T. Chong (CoRR, 2022)

Better Than Worst-Case Decoding for Quantum Error Correction. - Gokul Subramanian Ravi; Jonathan M. Baker; Arash Fayyazi; Sophia Fuhui Lin; Ali Javadi-Abhari; Massoud Pedram; Frederic T. Chong (ASPLOS (2), 2023)

Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks. - Jingkai Hong; Arash Fayyazi; Amirhossein Esmaili; Mahdi Nazemi; Massoud Pedram (DAC, 2023)

A Fast Training-Free Compression Framework for Vision Transformers. - Jung Hwan Heo; Arash Fayyazi; Mahdi Nazemi; Massoud Pedram (CoRR, 2023)

SNT: Sharpness-Minimizing Network Transformation for Fast Compression-friendly Pretraining. - Jung Hwan Heo; Seyedarmin Azizi; Arash Fayyazi; Mahdi Nazemi; Massoud Pedram (CoRR, 2023)

BlendNet: Design and Optimization of a Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions. - Arash Fayyazi; Mahdi Nazemi; Armin Abdollahi; Massoud Pedram (CoRR, 2023)

Sensitivity-Aware Mixed-Precision Quantization and Width Optimization of Deep Neural Networks Through Cluster-Based Tree-Structured Parzen Estimation. - Seyedarmin Azizi; Mahdi Nazemi; Arash Fayyazi; Massoud Pedram (CoRR, 2023)

Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis. - Soheil Nazar Shahsavani; Arash Fayyazi; Mahdi Nazemi; Massoud Pedram (ACM Trans. Reconfigurable Technol. Syst., 2023)

Automated Optimization of Deep Neural Networks: Dynamic Bit-Width and Layer-Width Selection via Cluster-Based Parzen Estimation. - Seyedarmin Azizi; Mahdi Nazemi; Arash Fayyazi; Massoud Pedram (DATE, 2024)

NeuroBlend: Towards Low-Power yet Accurate Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions. - Arash Fayyazi; Mahdi Nazemi; Arya Fayyazi; Massoud Pedram (ACM Great Lakes Symposium on VLSI, 2024)

PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers. - Mohammad Erfan Sadeghi; Arash Fayyazi; Seyedarmin Azizi; Massoud Pedram (ISLPED, 2024)

Scalable Superconductor Neuron with Ternary Synaptic Connections for Ultra-Fast SNN Hardware. - Mustafa Altay Karamuftuoglu; Beyza Zeynep Ucpinar; Arash Fayyazi; Sasan Razmkhah; Mehdi Kamal; Massoud Pedram (CoRR, 2024)

CHOSEN: Compilation to Hardware Optimization Stack for Efficient Vision Transformer Inference. - Mohammad Erfan Sadeghi; Arash Fayyazi; Suhas Somashekar; Massoud Pedram (CoRR, 2024)