Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems. - Aravindh Anantaraman; Kiran Seth; Kaustubh Patil; Eric Rotenberg; Frank Mueller 001 (ISCA, 2003)

Enforcing Safety of Real-Time Schedules on Contemporary Processors Using a Virtual Simple Architecture (VISA). - Aravindh Anantaraman; Kiran Seth; Eric Rotenberg; Frank Mueller 001 (RTSS, 2004)

Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing. - Ali El-Haj-Mahmoud; Ahmed S. Al-Zawawi; Aravindh Anantaraman; Eric Rotenberg (CASES, 2005)

Non-uniform program analysis & repeatable execution constraints: exploiting out-of-order processors in real-time systems. - Aravindh Anantaraman; Eric Rotenberg (SIGBED Rev., 2006)

FAST: Frequency-aware static timing analysis. - Kiran Seth; Aravindh Anantaraman; Frank Mueller 001; Eric Rotenberg (ACM Trans. Embed. Comput. Syst., 2006)