A Low Power High Performance Distributed DCT Architecture. - Ahmed M. Shams; Wendi Pan; Archana Chidanandan; Magdy A. Bayoumi (ISVLSI, 2002)

Enhanced Parallel Interference Cancellation using Decorrelator for the base-station receiver. - Archana Chidanandan; Magdy A. Bayoumi (ISCAS (4), 2004)

Novel systolic array architecture for the decorrelator using conjugate gradient for least squares algorithm. - Archana Chidanandan; Magdy A. Bayoumi (ISCAS (6), 2005)

Area-Efficient NEDA Architecture for The 1-D DCT/IDCT. - Archana Chidanandan; Magdy A. Bayoumi (ICASSP (3), 2006)

NEDA: a low-power high-performance DCT architecture. - Ahmed M. Shams; Archana Chidanandan; Wendi Pan; Magdy A. Bayoumi (IEEE Trans. Signal Process., 2006)

Design and Implementation of a Minuscule General Purpose Processor in an Undergraduate Computer Architecture Course. - Archana Chidanandan; J. P. Mellor; Laurence D. Merkle (MSE, 2007)

Adopting pen-based technology to facilitate active learning in the classroom: is it right for you? - Archana Chidanandan; Shannon M. Sexton (ITiCSE, 2008)

In their words: student feedback on an international project collaboration. - Archana Chidanandan; Lori Russell-Dag; Cary Laxer; Reyyan Ayfer (SIGCSE, 2010)