FinFET Device Circuit Co-design Issues: Impact of Circuit Parameters on Delay. - Archana Pandey; Harsh Kumar; Praanshu Goyal; Sudeb Dasgupta; S. K. Manhas; Anand Bulusu (VLSID, 2016)

A modified method of logical effort for FinFET circuits considering impact of fin-extension effects. - Archana Pandey; Pitul Garg; Shobhit Tyagi; Rajeev Ranjan; Anand Bulusu (ISQED, 2018)

A Novel 20nm FinFET Based 10T SRAM Cell Design for Improved Performance. - Anushka Singh; Yash Sharma 005; Arvind Sharma; Archana Pandey (VDAT, 2019)

Behaviour of FinFET Inverter's Effective Capacitances in Low-Voltage Domain. - Sarita Yadav; Nitanshu Chauhan; Archana Pandey; Rajendra Pratap; Anand Bulusu (VDAT, 2021)