Statistical methods for the estimation of quantization effects in FIR-based multirate systems. - Arda Yurdakul; Günhan Dündar (IEEE Trans. Signal Process., 1999)

Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions. - Arda Yurdakul; Günhan Dündar (J. VLSI Signal Process., 1999)

A synthesis tool for the multiplierless realization of FIR-based multirate DSP systems. - Arda Yurdakul (ISCAS, 2000)

Multiplierless implementation of 2-D FIR filters. - Arda Yurdakul (Integr., 2005)

SIxD: A Configurable Application-Specific SISD/SIMD Microprocessor Soft-Core. - Nehir Sönmez; Arda Yurdakul (SoC, 2006)

Low-cost solution to on-line color filter array demosaicking. - Gökhan Kabukcu; Arda Yurdakul (Int. J. Imaging Syst. Technol., 2007)

An Algorithm for the Design of Low-Power Hardware-Efficient FIR Filters. - Mustafa Aktan; Arda Yurdakul; Günhan Dündar (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Design automation model for application-specific processors on reconfigurable fabric. - Bayram Kurumahmut; Gökhan Kabukcu; Roza Ghamari; Arda Yurdakul (FDL, 2009)

Halftoning soft cores for low-cost digital displays. - Muhammet Erkoc; Arda Yurdakul (ISCIS, 2009)

Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems. - Dogan Fennibay; Arda Yurdakul; Alper Sen 001 (CIT, 2010)

A self-reconfigurable platform for general purpose image processing systems on low-cost spartan-6 FPGAs. - Salih Bayar; Mehmet Tükel; Arda Yurdakul (ReCoSoC, 2011)

A Verifiable High Level Data Path Synthesis Framework. - Gorker Alp Malazgirt; Ender Culha; Alper Sen 001; I. Faik Baskaya; Arda Yurdakul (DSD, 2012)

High-Level verifiable data-path Synthesis for DSP systems. - Ender Culha; Gorker Alp Malazgirt; I. Faik Baskaya; Alper Sen 001; Arda Yurdakul (SIU, 2012)

A dynamically reconfigurable communication architecture for multicore embedded systems. - Salih Bayar; Arda Yurdakul (J. Syst. Archit., 2012)

A Heterogeneous Simulation and Modeling Framework for Automation Systems. - Dogan Fennibay; Arda Yurdakul; Alper Sen 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Efficient Implementations of Multi-pumped Multi-port Register Files in FPGAs. - Hasan Erdem Yantir; Salih Bayar; Arda Yurdakul (DSD, 2013)

Application specific multi-port memory customization in FPGAs. - Gorker Alp Malazgirt; Hasan Erdem Yantir; Arda Yurdakul; Smaïl Niar (FPL, 2014)

MIPT: Rapid exploration and evaluation for migrating sequential algorithms to multiprocessing systems with multi-port memories. - Gorker Alp Malazgirt; Arda Yurdakul; Smaïl Niar (HPCS, 2014)

A dynamically reconfigurable architecture for emergency and disaster management in ITS. - Smaïl Niar; Arda Yurdakul; Osman S. Unsal; Tuna Tugcu; Aziz C. Yücetürk (ICCVE, 2014)

An Efficient Heterogeneous Register File Implementation for FPGAs. - Hasan Erdem Yantir; Arda Yurdakul (IPDPS Workshops, 2014)

Exploring Embedded Symmetric Multiprocessing with Various On-Chip Architectures. - Gorker Alp Malazgirt; Bora Kiyan; Deniz Candas; Kamil Erdayandi; Arda Yurdakul (EUC, 2015)

Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology (Abstract Only). - Gorker Alp Malazgirt; Nehir Sönmez; Arda Yurdakul; Osman S. Unsal; Adrián Cristal (FPGA, 2015)

High Level Synthesis Based Hardware Accelerator Design for Processing SQL Queries. - Gorker Alp Malazgirt; Nehir Sönmez; Arda Yurdakul; Adrián Cristal; Osman S. Unsal (FPGAworld, 2015)

Customizing VLIW processors from dynamically profiled execution traces. - Gorker Alp Malazgirt; Arda Yurdakul; Smaïl Niar (Microprocess. Microsystems, 2015)

PFMAP: Exploitation of Particle Filters for Network-on-Chip Mapping. - Salih Bayar; Arda Yurdakul (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Big Data and HPC Acceleration with Vivado HLS. - Moritz Schmid; Christian Schmitt 003; Frank Hannig; Gorker Alp Malazgirt; Nehir Sönmez; Arda Yurdakul; Adrián Cristal (FPGAs for Software Programmers, 2016)

An efficient mapping algorithm on 2-D mesh Network-on-Chip with reconfigurable switches. - Salih Bayar; Arda Yurdakul (DTIS, 2016)

Taxim: A Toolchain for Automated and Configurable Simulation for Embedded Multiprocessor Design. - Gorker Alp Malazgirt; Deniz Candas; Arda Yurdakul (CoRR, 2016)

Integrating low-power IoT devices to a blockchain-based infrastructure: work-in-progress. - Kazim Rifat Özyilmaz; Arda Yurdakul (EMSOFT Companion, 2017)

Prenaut: Design space exploration for embedded symmetric multiprocessing with various on-chip architectures. - Gorker Alp Malazgirt; Arda Yurdakul (J. Syst. Archit., 2017)

AxleDB: A novel programmable query processing platform on FPGA. - Behzad Salami 001; Gorker Alp Malazgirt; Oriol Arcas-Abella; Arda Yurdakul; Nehir Sönmez (Microprocess. Microsystems, 2017)

IDMoB: IoT Data Marketplace on Blockchain. - Kazim Rifat Ozyilmaz; Mehmet Dogan; Arda Yurdakul (CVCBT, 2018)

WIP: Daily Life Oriented Indoor Localization by Fusion of Smartphone Sensors and Wi-Fi. - Ayse Vildan Nurdag; Bert Arnrich; Arda Yurdakul (SMARTCOMP, 2018)

Designing a blockchain-based IoT infrastructure with Ethereum, Swarm and LoRa. - Kazim Rifat Ozyilmaz; Arda Yurdakul (CoRR, 2018)

Customizable embedded processor array for multimedia applications. - Mehmet Tükel; Arda Yurdakul; Berna Örs (Integr., 2018)

Designing a Blockchain-Based IoT With Ethereum, Swarm, and LoRa: The Software Solution to Create High Availability With Minimal Security Risks. - Kazim Rifat Ozyilmaz; Arda Yurdakul (IEEE Consumer Electron. Mag., 2019)

Model-based Design of a Roadside Unit for Emergency and Disaster Management. - Nur Hilal; Arda Yurdakul (NOMS, 2020)

An Embedded RISC-V Core with Fast Modular Multiplication. - Ömer Faruk Irmak; Arda Yurdakul (CoRR, 2020)

SIMDify: Framework for SIMD-Processing with RISC-V Scalar Instruction Set. - Mehmet Alp Sarkisla; Arda Yurdakul (ACSW, 2021)

A Clustering-Based Scoring Mechanism for Malicious Model Detection in Federated Learning. - Cem Caglayan; Arda Yurdakul (DSD, 2022)

A Decentralized Framework with Dynamic and Event-Driven Container Orchestration at the Edge. - Umut Can Özyar; Arda Yurdakul (iThings/GreenCom/CPSCom/SmartData/Cybermatics, 2022)

Image Classification on Accelerated Neural Networks. - Ilkay Sikdokur; Inci M. Baytas; Arda Yurdakul (CoRR, 2022)

Container Scheduling Under ARINC 653 Scheduler Constraints. - Mehmet Sirin Onen; Arda Yurdakul (DSD, 2023)

ElectAnon: A Blockchain-based, Anonymous, Robust, and Scalable Ranked-choice Voting Protocol. - Ceyhun Onur; Arda Yurdakul (Distributed Ledger Technol. Res. Pract., 2023)

EdgeConvEns: Convolutional Ensemble Learning for Edge Intelligence. - Ilkay Sikdokur; Inci M. Baytas; Arda Yurdakul (IEEE Access, 2024)

Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices. - Emre Bilgili; Arda Yurdakul (IEEE Embed. Syst. Lett., 2024)