Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications. - Arish Sateesan; Jo Vliegen; Joan Daemen; Nele Mentens (DSD, 2020)

DASH: Design Automation for Synthesis and Hardware Generation for CNN. - Arish Sateesan; Sharad Sinha; Smitha K. G. (FPT, 2020)

Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA. - Thomas Claesen; Arish Sateesan; Jo Vliegen; Nele Mentens (DSD, 2021)

Speed Records in Network Flow Measurement on FPGA. - Arish Sateesan; Jo Vliegen; Simon Scherrer; Hsu-Chun Hsiao; Adrian Perrig; Nele Mentens (FPL, 2021)

SoK - Network Intrusion Detection on FPGA. - Laurens Le Jeune; Arish Sateesan; Md Masoom Rabbani; Toon Goedemé; Jo Vliegen; Nele Mentens (SPACE, 2021)

Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. - Simon Scherrer; Che-Yu Wu; Yu-Hsi Chiang; Benjamin Rothenberger; Daniele Enrico Asoni; Arish Sateesan; Jo Vliegen; Nele Mentens; Hsu-Chun Hsiao; Adrian Perrig (SRDS, 2021)

A Survey of Algorithmic and Hardware Optimization Techniques for Vision Convolutional Neural Networks on FPGAs. - Arish Sateesan; Sharad Sinha; Smitha K. G.; A. P. Vinod 001 (Neural Process. Lett., 2021)

An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security. - Arish Sateesan; Jo Vliegen; Nele Mentens (SPACE, 2022)

Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications. - Arish Sateesan; Jo Vliegen; Joan Daemen; Nele Mentens (Microprocess. Microsystems, 2022)

Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications. - Mujtaba Hassan; Arish Sateesan; Jo Vliegen; Stjepan Picek; Nele Mentens (EvoApplications@EvoStar, 2023)

ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. - Simon Scherrer; Jo Vliegen; Arish Sateesan; Hsu-Chun Hsiao; Nele Mentens; Adrian Perrig (SRDS, 2023)

Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware. - Arish Sateesan; Jelle Biesmans; Thomas Claesen; Jo Vliegen; Nele Mentens (Microprocess. Microsystems, 2023)

A Genetic Programming approach for hardware-oriented hash functions for network security applications. - Mujtaba Hassan; Arish Sateesan; Jo Vliegen; Stjepan Picek; Nele Mentens (Appl. Soft Comput., 2024)

SPArch: A Hardware-oriented Sketch-based Architecture for High-speed Network Flow Measurements. - Arish Sateesan; Jo Vliegen; Simon Scherrer; Hsu-Chun Hsiao; Adrian Perrig; Nele Mentens (ACM Trans. Priv. Secur., 2024)

FLARE: An FPGA-Based Universal Large Flow Detection Engine. - Arish Sateesan; Jo Vliegen; Nele Mentens (ARC, 2025)