RF parameter extraction of underlap DG MOSFETs: a look up table based approach. - Atanu Kundu 001; Arka Dutta; Kalyan Koley; S. Niyogi; Chandan Kumar Sarkar (IET Circuits Devices Syst., 2014)

Analysis of Harmonic distortion in asymmetric underlap DG-MOSFET with high-k spacer. - Arka Dutta; Kalyan Koley; Chandan Kumar Sarkar (Microelectron. Reliab., 2014)

Impact of gate metal work-function engineering for enhancement of subthreshold analog/RF performance of underlap dual material gate DG-FET. - Atanu Kundu 001; Kalyan Koley; Arka Dutta; Chandan Kumar Sarkar (Microelectron. Reliab., 2014)

Study of body and oxide thickness variation on analog and RF performance of underlap DG-MOSFETs. - Sudhansu Kumar Pati; Kalyan Koley; Arka Dutta; N. Mohankumar 002; Chandan Kumar Sarkar (Microelectron. Reliab., 2014)

Asymmetric Underlap Dual Material Gate DG-FET for Low Power Analog/RF Applications. - Atanu Kundu 001; Arka Dutta; Chandan Kumar Sarkar (J. Low Power Electron., 2015)

Impact of lateral straggle on analog and digital circuit performance using independently driven underlap DG-MOSFET. - Sagar Mukherjee; Arka Dutta; Swarnil Roy; Kalyan Koley; Chandan Kumar Sarkar (Microelectron. J., 2015)

Low-power amplitude modulator for wireless application using underlap double-gate metal-oxide-semiconductor field-effect transistor. - Sagar Mukherjee; Kalyan Koley; Arka Dutta; Chandan Kumar Sarkar (IET Circuits Devices Syst., 2016)

Study on effect of back oxide thickness variation in FDSOI MOSFET on analogue circuit performance. - Sagar Mukherjee; Swarnil Roy; Arka Dutta; Chandan Kumar Sarkar (IET Circuits Devices Syst., 2016)

Impact of temperature on linearity and harmonic distortion characteristics of underlapped FinFET. - Arka Dutta; Kalyan Koley; Samar K. Saha; Chandan Kumar Sarkar (Microelectron. Reliab., 2016)

Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs. - Sanjit Kumar Swain; Arka Dutta; Sarosij Adak; Sudhansu Kumar Pati; Chandan Kumar Sarkar (Microelectron. Reliab., 2016)

Implementation of Low Power Programmable Flash ADC Using IDUDGMOSFET. - Sagar Mukherjee; Arka Dutta; Swarnil Roy; Chandan Kumar Sarkar (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application. - Swarnil Roy; Sagar Mukherjee; Arka Dutta; Chandan Kumar Sarkar; Chayanika Bose (IET Circuits Devices Syst., 2019)

Classification of Cricket Shots from Cricket Videos Using Self-attention Infused CNN-RNN (SAICNN-RNN). - Arka Dutta; Abhishek Baral; Sayan Kundu; Sayantan Biswas; Kousik Dasgupta; Hasanujaman (CICBA (1), 2023)

Down the Toxicity Rabbit Hole: Investigating PaLM 2 Guardrails. - Adel Khorramrouz; Sujan Dutta; Arka Dutta; Ashiqur R. KhudaBukhsh (CoRR, 2023)

Down the Toxicity Rabbit Hole: A Framework to Bias Audit Large Language Models with Key Emphasis on Racism, Antisemitism, and Misogyny. - Arka Dutta; Adel Khorramrouz; Sujan Dutta; Ashiqur R. KhudaBukhsh (IJCAI, 2024)

All You Need Is S P A C E: When Jailbreaking Meets Bias Audit and Reveals What Lies Beneath the Guardrails (Student Abstract). - Arka Dutta; Aman Priyanshu; Ashiqur R. KhudaBukhsh (AAAI, 2025)

Navigating the Rabbit Hole: Emergent Biases in LLM-Generated Attack Narratives Targeting Mental Health Groups. - Rijul Magu; Arka Dutta; Sean Kim; Ashiqur R. KhudaBukhsh; Munmun De Choudhury (CoRR, 2025)