High throughput, low latency, memory optimized 64K point FFT architecture using novel radix-4 butterfly unit. - S. Kala; Nalesh Sivanandan; Arka Maity; S. K. Nandy 001; Ranjani Narayan (ISCAS, 2013)

Co-exploration of NLA kernels and specification of Compute Elements in distributed memory CGRAs. - Mahesh Mahadurkar; Farhad Merchant; Arka Maity; Kapil Vatwani; Ishan Munje; Nandhini Gopalan; S. K. Nandy 001; Ranjani Narayan (ICSAMOS, 2014)

Micro-architectural Enhancements in Distributed Memory CGRAs for LU and QR Factorizations. - Farhad Merchant; Arka Maity; Mahesh Mahadurkar; Kapil Vatwani; Ishan Munje; Madhava Krishna C; Nalesh Sivanandan; Nandhini Gopalan; Soumyendu Raha; S. K. Nandy 001; Ranjani Narayan (VLSID, 2015)

Power-Efficient Heterogeneous Many-Core Design With NCFET Technology. - Sami Salamin; Martin Rapp; Anuj Pathania; Arka Maity; Jörg Henkel; Tulika Mitra; Hussam Amrouch (IEEE Trans. Computers, 2021)

Load balancing for a user-level virtualized 5G cloud-RAN. - Nishant Budhdev; Arka Maity; Mun Choon Chan; Tulika Mitra (MobiArch, 2022)