Timing vulnerability factors of sequential elements in modern microprocessors. - Arkady Bramnik; Andrei Sherban; Norbert Seifert (IOLTS, 2013)

Flip-flop SEU reduction through minimization of the temporal vulnerability factor (TVF). - Adrian Evans; Enrico Costenaro; Arkady Bramnik (IOLTS, 2015)

Don't Correct the Tags in a Cache, Just Check Their Hamming Distance from the Lookup Tag. - Alex Gendler; Arkady Bramnik; Ariel Szapiro; Yiannakis Sazeides (HPCA, 2018)

To Detect or to Correct? - Arkady Bramnik; Yiannakis Sazeides (IOLTS, 2018)

Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core. - Ron Gabor; Yiannakis Sazeides; Arkady Bramnik; Alexandros Andreou; Chrysostomos Nicopoulos; Karyofyllis Patsidis; Dimitris Konstantinou; Giorgos Dimitrakopoulos (DATE, 2019)

2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD). - Yiannakis Sazeides; Arkady Bramnik; Ron Gabor; Chrysostomos Nicopoulos; Ramon Canal; Dimitris Konstantinou; Giorgos Dimitrakopoulos (DFT, 2020)

SRAM Arrays with Built-in Parity Computation for Real-Time Error Detection in Cache Tag Arrays. - Ramon Canal; Yiannakis Sazeides; Arkady Bramnik (DATE, 2021)

IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming. - Yiannakis Sazeides; Alex Gerber; Ron Gabor; Arkady Bramnik; George Papadimitriou 001; Dimitris Gizopoulos; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos; Karyofyllis Patsidis (MICRO, 2022)

A Real-Time Error Detection (RTD) Architecture and Its Use for Reliability and Post-Silicon Validation for F/F Based Memory Arrays. - Yiannakis Sazeides; Arkady Bramnik; Ron Gabor; Ramon Canal (IEEE Trans. Emerg. Top. Comput., 2022)