A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS. - Ashkan Roshan-Zamir; Takayuki Iwai; Yang-Hang Fan; Ankur Kumar; Hae-Woong Yang; Lee Sledjeski; John Hamilton; Soumya Chandramouli; Arlo Aude; Samuel Palermo (CICC, 2018)

A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS. - Ashkan Roshan-Zamir; Takayuki Iwai; Yang-Hang Fan; Ankur Kumar; Hae-Woong Yang; Lee Sledjeski; John Hamilton; Soumya Chandramouli; Arlo Aude; Samuel Palermo (IEEE J. Solid State Circuits, 2019)