Control of design specific variation in etch-assisted via pattern transfer by means of full-chip simulation. - Valeriy Sukharev; Ara Markosian; Armen Kteyan; Levon Manukyan; Nikolay Khachatryan; Jun-Ho Choy; Hasmik Lazaryan; Henrik Hovsepyan; Seiji Onoue; Takuo Kikuchi; Tetsuya Kamigaki (ISQED, 2009)

Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance. - Valeriy Sukharev; Armen Kteyan; Jun-Ho Choy; Henrik Hovsepyan; Ara Markosian; Ehrenfried Zschech; Rene Huebner (J. Electron. Test., 2012)

Post placement leakage reduction with stress-enhanced filler cells. - Jun-Ho Choy; Valeriy Sukharev; Armen Kteyan; Henrik Hovsepyan; Ramnath Venkatraman; Ruggero Castagnetti (ISLPED, 2015)

Physics-Based Electromigration Models and Full-Chip Assessment for Power Grid Networks. - Xin Huang 003; Armen Kteyan; Sheldon X.-D. Tan; Valeriy Sukharev (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

An Accurate Assessment of Chip-Package Interaction is a Key Factor for Designing Resilient 3D IC Systems. - Valeriy Sukharev; Armen Kteyan; Jun-Ho Choy (3DIC, 2019)

Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages. - Armen Kteyan; Henrik Hovsepyan; Jun-Ho Choy; Valeriy Sukharev (IRPS, 2019)

Novel methodology for temperature-aware electromigration assessment in on-chip power grid: simulations and experimental validation (Invited). - Armen Kteyan; Valeriy Sukharev; Y. Yi; Chris H. Kim (IRPS, 2022)

Novel Methodology for Assessing Chip-Package Interaction Effects onChip Performance. - Armen Kteyan; Jun-Ho Choy; Valeriy Sukharev; Massimo Bertoletti; Carmelo Maiorca; Rossana Zadra; Massimo Inzaghi; Gabriele Gattere; Giancarlo Zinco; Paolo Valente; Roberto Bardelli; Alessandro Valerio; et al. (ISPD, 2022)

Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids. - Valeriy Sukharev; Armen Kteyan; Farid N. Najm; Yong Hyeon Yi; Chris H. Kim; Jun-Ho Choy; Sofya Torosyan; Yu Zhu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip Heaters. - Yong Hyeon Yi; Chris H. Kim; Chen Zhou; Armen Kteyan; Valeriy Sukharev (IRPS, 2023)

Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution. - Armen Kteyan; Valeriy Sukharev; Alexander Volkov; Jun-Ho Choy; Farid N. Najm; Yong Hyeon Yi; Chris H. Kim; Stéphane Moreau (ISPD, 2023)

A Novel Method for the Determination of Electromigration-Induced Void Nucleation Stresses. - J. Shuster-Passage; S. Abdel Razek; M. Mattoo; Meike Hauschildt; Seungman Choi; Martin Gall; Armen Kteyan; Jun-Ho Choy; Valeriy Sukharev; Matthias Kraatz; J. R. Lloyd (IRPS, 2024)

A Unified Physics-Based Stochastic Model for EM-Induced Resistance Degradation in BEoL Interconnect Segments. - Valeriy Sukharev; Jun-Ho Choy; Armen Kteyan; J. Shuster-Passage; Seungman Choi; Martin Gall (IRPS, 2024)

Electromigration Test Chip Experiments from Realistic Power Grid Structures: Failure Trend Comparison and Statistical Analysis. - Yong Hyeon Yi; Chris H. Kim; Armen Kteyan; Alexander Volkov; Stéphane Moreau; Valeriy Sukharev (IRPS, 2024)

Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction Effects. - Jun-Ho Choy; Stéphane Moreau; Catherine Brunet-Manquat; Valeriy Sukharev; Armen Kteyan (ISPD, 2024)

A Physics-Based Electromigration Assessment of Analog Circuits. - J.-H. Choy; Armen Kteyan; R. Kang; S. Jo; Valeriy Sukharev; S. Choi; J. Passage; I. Kühn; Markus Herklotz; M. Gall (IRPS, 2025)

Electromigration Assessment in Power Grids with Account of Non-Uniform Temperature Distribution. - Armen Kteyan; J. Choy; Valeriy Sukharev; Stéphane Moreau; Y. Yi; R. Bloom; C. Kim (IRPS, 2025)