MoCReS: an Area-Efficient Multi-Clock On-Chip Network for Reconfigurable Systems. - Arun Janarthanan; Vijay Swaminathan; Karen A. Tomko (ISVLSI, 2007)

MoCSYS: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated Topology Synthesis Framework for System-Level Design of FPGA Based On-Chip Networks. - Arun Janarthanan; Karen A. Tomko (VLSI Design, 2008)