A New High Density and Very Low Cost Reprogrammable FPGA Architecture. - Sinan Kaptanoglu; Greg Bakker; Arun Kundu; Ivan Corneillet; Ben Ting (FPGA, 1999)

A technique for minimizing power during FPGA placement. - Kristofer Vorwerk; Madhu Raman; Julien Dunoyer; Yaun-Chung Hsu; Arun Kundu; Andrew A. Kennings (FPL, 2008)

FPGA technology mapping with encoded libraries andstaged priority cuts. - Andrew A. Kennings; Kristofer Vorwerk; Arun Kundu; Val Pevzner; Andy Fox (FPGA, 2009)

Efficient FPGA Resynthesis Using Precomputed LUT Structures. - Andrew A. Kennings; Alan Mishchenko; Kristofer Vorwerk; Val Pevzner; Arun Kundu (FPL, 2010)

Power minimisation during field programmable gate array placement. - Kristofer Vorwerk; Andrew A. Kennings; Val Pevzner; Arun Kundu; Madhu Raman; Julien Dunoyer; Yaun-shung Hsu (IET Comput. Digit. Tech., 2010)

FPGA technology mapping with encoded libraries and staged priority cuts. - Andrew A. Kennings; Kristofer Vorwerk; Arun Kundu; Val Pevzner; Andy Fox (ACM Trans. Reconfigurable Technol. Syst., 2011)

Rent's rule based FPGA packing for routability optimization. - Wenyi Feng; Jonathan W. Greene; Kristofer Vorwerk; Val Pevzner; Arun Kundu (FPGA, 2014)

Multi-Commodity Flow-Based Spreading in a Commercial Analytic Placer. - Nima Karimpour Darav; Andrew A. Kennings; Kristofer Vorwerk; Arun Kundu (FPGA, 2019)