Phased array systems in silicon. - Ali Hajimiri; Abbas Komijani; Arun Natarajan 001; Rumi Chunara; Xiang Guan; Hossein Hashemi 001 (IEEE Commun. Mag., 2004)

A 24 GHz phased-array transmitter in 0.18µm CMOS. - Arun Natarajan 001; Abbas Komijani; Ali Hajimiri (DAC, 2005)

A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18-μm CMOS. - Abbas Komijani; Arun Natarajan 001; Ali Hajimiri (IEEE J. Solid State Circuits, 2005)

A fully integrated 24-GHz phased-array transmitter in CMOS. - Arun Natarajan 001; Abbas Komijani; Ali Hajimiri (IEEE J. Solid State Circuits, 2005)

Integrated Phased Array Systems in Silicon. - Ali Hajimiri; Hossein Hashemi 001; Arun Natarajan 001; Xiang Guan; Abbas Komijani (Proc. IEEE, 2005)

A 77GHz 4-Element Phased Array Receiver with On-Chip Dipole Antennas in Silicon. - Aydin Babakhani; Xiang Guan; Abbas Komijani; Arun Natarajan 001; Ali Hajimiri (ISSCC, 2006)

A 77GHz Phased-Array Transmitter with Local LO-Path Phase-Shifting in Silicon. - Arun Natarajan 001; Abbas Komijani; Xiang Guan; Aydin Babakhani; Y. Wang; Ali Hajimiri (ISSCC, 2006)

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas. - Aydin Babakhani; Xiang Guan; Abbas Komijani; Arun Natarajan 001; Ali Hajimiri (IEEE J. Solid State Circuits, 2006)

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Transmitter and Local LO-Path Phase Shifting. - Arun Natarajan 001; Abbas Komijani; Xiang Guan; Aydin Babakhani; Ali Hajimiri (IEEE J. Solid State Circuits, 2006)

A Bidirectional RF-Combining 60GHz Phased-Array Front-End. - Arun Natarajan 001; Brian A. Floyd; Ali Hajimiri (ISSCC, 2007)

A Scalable 6-to-18GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS. - Sanggeun Jeon; Yu-Jiu Wang; Hua Wang; Florian Bohn; Arun Natarajan 001; Aydin Babakhani; Ali Hajimiri (ISSCC, 2008)

A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS. - Sanggeun Jeon; Yu-Jiu Wang; Hua Wang; Florian Bohn; Arun Natarajan 001; Aydin Babakhani; Ali Hajimiri (IEEE J. Solid State Circuits, 2008)

A SiGe BiCMOS 16-element phased-array transmitter for 60GHz communications. - Alberto Valdes-Garcia; Sean Nicolson; Jie-Wei Lai; Arun Natarajan 001; Ping-Yu Chen; Scott K. Reynolds; Jing-Hong Conan Zhan; Brian A. Floyd (ISSCC, 2010)

A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications. - Alberto Valdes-Garcia; Sean T. Nicolson; Jie-Wei Lai; Arun Natarajan 001; Ping-Yu Chen; Scott K. Reynolds; Jing-Hong Conan Zhan; Dong Gun Kam; Duixian Liu; Brian A. Floyd (IEEE J. Solid State Circuits, 2010)

Indirect phase noise sensing for self-healing voltage controlled oscillators. - Soner Yaldiz; Vehbi Calayir; Xin Li 001; Lawrence T. Pileggi; Arun Natarajan 001; Mark A. Ferriss; José A. Tierno (CICC, 2011)

Single-element and phased-array transceiver chipsets for 60-ghz Gb/s communications. - Alberto Valdes-Garcia; Scott K. Reynolds; Arun Natarajan 001; Dong Gun Kam; Duixian Liu; Jie-Wei Lai; Yen-Lin Oscar Huang; Ping-Yu Chen; Ming-Da Tsai; Jing-Hong Conan Zhan; Sean Nicolson; Brian A. Floyd (IEEE Commun. Mag., 2011)

A Fully-Integrated 16-Element Phased-Array Receiver in SiGe BiCMOS for 60-GHz Communications. - Arun Natarajan 001; Scott K. Reynolds; Ming-Da Tsai; Sean T. Nicolson; Jing-Hong Conan Zhan; Dong Gun Kam; Duixian Liu; Yen-Lin Oscar Huang; Alberto Valdes-Garcia; Brian A. Floyd (IEEE J. Solid State Circuits, 2011)

A 23.5GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS. - Jean-Olivier Plouchart; Mark A. Ferriss; Arun Natarajan 001; Alberto Valdes-Garcia; Bodhisatwa Sadhu; Alexander V. Rylyakov; Benjamin D. Parker; Michael P. Beakes; Aydin Babakhani; Soner Yaldiz; Lawrence T. Pileggi; Ramesh Harjani; et al. (CICC, 2012)

An integral path self-calibration scheme for a 20.1-26.7GHz dual-loop PLL in 32nm SOI CMOS. - Mark A. Ferriss; Jean-Olivier Plouchart; Arun Natarajan 001; Alexander V. Rylyakov; Benjamin D. Parker; Aydin Babakhani; Soner Yaldiz; Bodhisatwa Sadhu; Alberto Valdes-Garcia; José A. Tierno; Daniel J. Friedman (VLSIC, 2012)

Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion. - Shupeng Sun; Fa Wang; Soner Yaldiz; Xin Li 001; Lawrence T. Pileggi; Arun Natarajan 001; Mark A. Ferriss; Jean-Olivier Plouchart; Bodhisatwa Sadhu; Benjamin D. Parker; Alberto Valdes-Garcia; Mihai A. T. Sanduleanu; et al. (CICC, 2013)

An Integral Path Self-Calibration Scheme for a Dual-Loop PLL. - Mark A. Ferriss; Jean-Olivier Plouchart; Arun Natarajan 001; Alexander V. Rylyakov; Benjamin D. Parker; José A. Tierno; Aydin Babakhani; Soner Yaldiz; Alberto Valdes-Garcia; Bodhisatwa Sadhu; Daniel J. Friedman (IEEE J. Solid State Circuits, 2013)

A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing. - Bodhisatwa Sadhu; Mark A. Ferriss; Arun Natarajan 001; Soner Yaldiz; Jean-Olivier Plouchart; Alexander V. Rylyakov; Alberto Valdes-Garcia; Benjamin D. Parker; Aydin Babakhani; Scott K. Reynolds; Xin Li 001; Lawrence T. Pileggi; et al. (IEEE J. Solid State Circuits, 2013)

A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS. - Jean-Olivier Plouchart; Mark A. Ferriss; Arun Natarajan 001; Alberto Valdes-Garcia; Bodhisatwa Sadhu; Alexander V. Rylyakov; Benjamin D. Parker; Michael P. Beakes; Aydin Babakhani; Soner Yaldiz; Larry T. Pileggi; Ramesh Harjani; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Correction to "A Linearized, Low Phase Noise VCO Based 25 GHz PLL With Autonomic Biasing". - Bodhisatwa Sadhu; Mark A. Ferriss; Arun S. Natarajan 001; Soner Yaldiz; Jean-Olivier Plouchart; Alexander V. Rylyakov; Alberto Valdes-Garcia; Benjamin D. Parker; Aydin Babakhani; Scott K. Reynolds; Xin Li 001; Lawrence T. Pillage; et al. (IEEE J. Solid State Circuits, 2013)

9.6 A 1.3mW 0.6V WBAN-compatible sub-sampling PSK receiver in 65nm CMOS. - Jiao Cheng; Nan Qi; Patrick Yin Chiang; Arun Natarajan 001 (ISSCC, 2014)

A Low-Power, Low-Voltage WBAN-Compatible Sub-Sampling PSK Receiver in 65 nm CMOS. - Jiao Cheng; Nan Qi; Patrick Yin Chiang; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2014)

Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits. - Shupeng Sun; Fa Wang; Soner Yaldiz; Xin Li 001; Lawrence T. Pileggi; Arun Natarajan 001; Mark A. Ferriss; Jean-Olivier Plouchart; Bodhisatwa Sadhu; Benjamin D. Parker; Alberto Valdes-Garcia; Mihai A. T. Sanduleanu; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

W-band scalable phased arrays for imaging and communications. - Xiaoxiong Gu; Alberto Valdes-Garcia; Arun Natarajan 001; Bodhisatwa Sadhu; Duixian Liu; Scott K. Reynolds (IEEE Commun. Mag., 2015)

2.2 A scalable 28GHz coupled-PLL in 65nm CMOS with single-wire synchronization for large-scale 5G mm-wave arrays. - Abhishek Agrawal; Arun Natarajan 001 (ISSCC, 2016)

21.6 A 1.2cm2 2.4GHz self-oscillating rectifier-antenna achieving -34.5dBm sensitivity for wirelessly powered sensors. - Jian Kang 007; Patrick Yin Chiang; Arun Natarajan 001 (ISSCC, 2016)

9.2 A scalable 0.1-to-1.7GHz spatio-spectral-filtering 4-element MIMO receiver array with spatial notch suppression enabling digital beamforming. - Linxiao Zhang; Arun Natarajan 001; Harish Krishnaswamy (ISSCC, 2016)

A 74.6GHz-83.6GHz digitally controlled oscillator with 370kHz frequency resolution in 65nm CMOS. - Yunqi Wang; Yao Liu; Abhishek Agrawal; Arun Natarajan 001 (RWS, 2016)

Area-constrained wirelessly-powered UWB SoC design for small insect localization. - Jian Kang 007; Sujaya Rao; Patrick Chiang 001; Arun Natarajan 001 (WiSNet, 2016)

Scalable Spatial Notch Suppression in Spatio-Spectral-Filtering MIMO Receiver Arrays for Digital Beamforming. - Linxiao Zhang; Arun Natarajan 001; Harish Krishnaswamy (IEEE J. Solid State Circuits, 2016)

29.4 A 16Gb/s 3.6pJ/b wireline transceiver with phase domain equalization scheme: Integrated pulse width modulation (iPWM) in 65nm CMOS. - Ashwin Ramachandran; Arun Natarajan 001; Tejasvi Anand (ISSCC, 2017)

WiFO: A Hybrid WiFi Free-Space Optical Communication Networks of Femtocells. - Qiwei Wang; Spencer Liverman; Yu-Jung Chu; Anindita Borah; Songtao Wang; Thinh Nguyen; Arun Natarajan 001; Alan X. Wang (MSWiM, 2017)

Measurement-based channel modeling for mmWave wireless links in enclosed server platforms. - Guangxin Wang; Kai Zhan; Telesphor Kamgaing; Rahul Khanna; Huaping Liu 002; Arun Natarajan 001 (RWS, 2017)

Editorial. - Krishnendu Chakrabarty; Massimo Alioto; Bevan M. Baas; Chirn Chye Boon; Meng-Fan Chang; Naehyuck Chang; Yao-Wen Chang; Chip-Hong Chang; Shih-Chieh Chang; Poki Chen; Masud H. Chowdhury; Pasquale Corsonello; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Education session 4 - Low Power IoT wireless powering for ultra low power batteryless IoT sensing and communication. - Kamala Raghavan Sadagopan; Jian Kang 007; Arun Natarajan 001 (CICC, 2018)

A 0.55-to-0.9GHz 2.7dB NF full-duplex hybrid-coupler circulator with 56MHz 40dB TX SI suppression. - Sanket Jain; Abhishek Agrawal; Manoj Johnson; Arun Natarajan 001 (ISSCC, 2018)

A 960pW Co-Integrated-Antenna Wireless Energy Harvester for WiFi Backchannel Wireless Powering. - Kamala Raghavan Sadagopan; Jian Kang 007; Yogesh Ramadass; Arun Natarajan 001 (ISSCC, 2018)

WiFO: A hybrid communication network based on integrated free-space optical and WiFi femtocells. - Spencer Liverman; Qiwei Wang; Yu-Jung Chu; Anindita Borah; Songtao Wang; Arun Natarajan 001; Alan X. Wang; Thinh Nguyen (Comput. Commun., 2018)

An Interferer-Tolerant CMOS Code-Domain Receiver Based on N-Path Filters. - Abhishek Agrawal; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2018)

A cm-Scale 2.4-GHz Wireless Energy Harvester With NanoWatt Boost Converter and Antenna-Rectifier Resonance for WiFi Powering of Sensor Nodes. - Kamala Raghavan Sadagopan; Jian Kang 007; Yogesh Ramadass; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2018)

Introduction to the Special Issue on the 2018 IEEE International Solid-State Circuits Conference (ISSCC). - Yong Ping Xu; Tai-Haur Kuo; Matt Straayer; Harish Krishnaswamy; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2018)

Full-Duplex 2×2 MIMO Circulator-Receiver with High TX Power Handling Exploiting MIMO RF and Shared-Delay Baseband Self-Interference Cancellation. - Mahmood Baraani Dastjerdi; Sanket Jain; Negar Reiskarimian; Arun Natarajan 001; Harish Krishnaswamy (ISSCC, 2019)

Analysis and Design of a Full-Duplex Two-Element MIMO Circulator-Receiver With High TX Power Handling Exploiting MIMO RF and Shared-Delay Baseband Self-Interference Cancellation. - Mahmood Baraani Dastjerdi; Sanket Jain; Negar Reiskarimian; Arun Natarajan 001; Harish Krishnaswamy (IEEE J. Solid State Circuits, 2019)

Line Coding Techniques for Channel Equalization: Integrated Pulse-Width Modulation and Consecutive Digit Chopping. - Ashwin Ramachandran; Arun Natarajan 001; Tejasvi Anand (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 6-Transistor Ultra-Low Power CMOS Voltage Reference with 0.02%/V Line Sensitivity. - Hayden Bialek; Matthew L. Johnston; Arun Natarajan 001 (CICC, 2020)

WideScan: Exploiting Out-of-Band Distortion for Device Classification Using Deep Learning. - Abdurrahman Elmaghbub; Bechir Hamdaoui; Arun Natarajan 001 (GLOBECOM, 2020)

4.3 A 28GHz 4-Element MIMO Beam-Space Array in 65nm CMOS with Simultaneous Spatial Filtering and Single-Wire Frequency-Domain Multiplexing. - Robin Garg; Gaurav Sharma; Ali Binaie; Sanket Jain; Sohail Ahasan; Armagan Dascurcu; Harish Krishnaswamy; Arun Natarajan 001 (ISSCC, 2020)

Code-Domain Multiplexing for Shared IF/LO Interfaces in Millimeter-Wave MIMO Arrays. - Manoj Johnson; Armagan Dascurcu; Kai Zhan; Arman Galioglu; Naresh Kumar Adepu; Sanket Jain; Harish Krishnaswamy; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2020)

A 20 μ W, 0.05mm2 Duty-Cycled Resistor and Frequency-Locked-Loop-based Wheatstone Bridge Interface for Low Resistance Sensing Systems. - Jinyong Kim; Callen Votzke; Soumya Bose; Arun Natarajan 001; Matthew L. Johnston (CICC, 2021)

21.4 A 0.75-to-1GHz Passive Wideband Noise-Cancelling 171µW Wake-Up RX and 440µW Primary RX FE with -86dBm/10kb/s Sensitivity, 35dB SIR and 3.8dB RX NF. - Hayden Bialek; Sohail Ahasan; Ali Binaie; Kamala Raghavan Sadagopan; Matthew L. Johnston; Harish Krishnaswamy; Arun Natarajan 001 (ISSCC, 2021)

6.6 Full-Duplex Receiver with Wideband Multi-Domain FIR Cancellation Based on Stacked-Capacitor, N-Path Switched-Capacitor Delay Lines Achieving >54dB SIC Across 80MHz BW and >15dBm TX Power-Handling. - Aravind Nagulu; Sasank Garikapati; Mostafa Essawy; Igor Kadota; Tingjun Chen; Arun Natarajan 001; Gil Zussman; Harish Krishnaswamy (ISSCC, 2021)

Frequency-Domain-Multiplexing Single-Wire Interface and Harmonic-Rejection-Based IF Data De-Multiplexing in Millimeter-Wave MIMO Arrays. - Sohail Ahasan; Ali Binaie; Armagan Dascurcu; Mahmood Baraani Dastjerdi; Robin Garg; Manoj Johnson; Arman Galioglu; Arun Natarajan 001; Harish Krishnaswamy (IEEE J. Solid State Circuits, 2021)

A 28-GHz Beam-Space MIMO RX With Spatial Filtering and Frequency-Division Multiplexing-Based Single-Wire IF Interface. - Robin Garg; Gaurav Sharma; Ali Binaie; Sanket Jain; Sohail Ahasan; Armagan Dascurcu; Harish Krishnaswamy; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2021)

Excellent RF Product HTOL reliability of 5G mmWave beamformer chip fabricated using GF 45RFSOI technologies. - P. Srinivasan 002; Fernando Guarin; Enkhbayasgalan Gantsog; Harish Krishnaswamy; Arun Natarajan 001 (IRPS, 2022)

Wideband, Millimeter Wave Domain SI Canceling (>50dB) In-Band Full-Duplex Circulator Receiver. - Robin Garg; Sanket Jain; Arun S. Natarajan 001 (IEEE Access, 2022)

A Passive Wideband Noise-Canceling Mixer-First Architecture With Shared Antenna Interface for Interferer-Tolerant Wake-Up Receivers and Low-Noise Primary Receivers. - Hayden Bialek; Ali Binaie; Sohail Ahasan; Kamala Raghavan Sadagopan; Matthew L. Johnston; Harish Krishnaswamy; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2022)

A 0.4-to-0.95GHz Distributed N-Path Noise-Cancelling Ultra-Low-Power RX with Integrated Passives Achieving -85dBm/100kb/s Sensitivity, -41dB SIR and 174dB RX FoM in 22nm CMOS. - Hayden Bialek; Matthew L. Johnston; Arun Natarajan 001 (ISSCC, 2023)

ADC-Less 3D-NAND Compute-in-Memory Architecture Using Margin Propagation. - Aswin Chowdary Undavalli; Gert Cauwenberghs; Arun Natarajan 001; Shantanu Chakrabartty; Aravind Nagulu (MWSCAS, 2023)

A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios. - Hayden Bialek; Matthew L. Johnston; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2023)

12.3 A Scalable and Instantaneously Wideband 5GS/s RF Correlator Based on Charge Thresholding Achieving 8-bit ENOB and 152 TOPS/W Compute Efficiency. - Kareem Rashed; Aswin Chowdary Undavalli; Shantanu Chakrabartty; Aravind Nagulu; Arun Natarajan 001 (ISSCC, 2024)

Reconfigurable Matched Filtering Using Wideband Margin-Computing Correlators: Applications in Radar and Communication Signal Processing. - Kareem Rashed; Aswin Chowdary Undavalli; Shantanu Chakrabartty; Arun Natarajan 001; Aravind Nagulu (MWSCAS, 2024)

A Low-Noise Dual-Path Self-Interference Cancellation Architecture for Watt-Level TX Power Handling in Simultaneous Transmit and Receive. - Mostafa Essawy; Kareem Rashed; Amin Aghighi; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2024)

Full-Duplex Receiver With Wideband, High-Power RF Self-Interference Cancellation Based on Capacitor Stacking in Switched-Capacitor Delay Lines. - Sasank Garikapati; Aravind Nagulu; Igor Kadota; Mostafa Essawy; Tingjun Chen; Shibo Wang; Tanvi Pande; Arun Natarajan 001; Gil Zussman; Harish Krishnaswamy (IEEE J. Solid State Circuits, 2024)

A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing. - Kareem Rashed; Aswin Chowdary Undavalli; Shantanu Chakrabartty; Aravind Nagulu; Arun Natarajan 001 (IEEE J. Solid State Circuits, 2024)

A 4GS/s Fully Analog 256×256 MP-Based Cross-Correlator with 1000TOPS/W Compute Efficiency and 1.3TOPS/mm2 Compute Density in 22nm SOI CMOS. - Aswin Chowdary Undavalli; Kareem Rashed; Gert Cauwenberghs; Shantanu Chakrabartty; Arun Natarajan 001; Aravind Nagulu (ISSCC, 2025)

Physics-Informed Data-Driven Approaches to Electric Vehicle Battery State-of-Health Prediction: Comparison of Parallel and Series Configurations. - Yixin Zhao; Karl R. Haapala; Arun Natarajan 001; Sara Behdad (J. Comput. Inf. Sci. Eng., 2025)

A Framework for Designing and Analyzing Margin Propagation-Based Analog Correlators. - Zhili Xiao; Albert Kilgore; Gert Cauwenberghs; Arun Natarajan 001; Aravind Nagulu; Shantanu Chakrabartty (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)