Execution migration in a heterogeneous-ISA chip multiprocessor. - Matthew DeVuyst; Ashish Venkat; Dean M. Tullsen (ASPLOS, 2012)

Harnessing ISA diversity: Design of a heterogeneous-ISA chip multiprocessor. - Ashish Venkat; Dean M. Tullsen (ISCA, 2014)

HIPStR: Heterogeneous-ISA Program State Relocation. - Ashish Venkat; Sriskanda Shamasunder; Hovav Shacham; Dean M. Tullsen (ASPLOS, 2016)

Reliability-Aware Data Placement for Heterogeneous Memory Architecture. - Manish Gupta 010; Vilas Sridharan; David Roberts; Andreas Prodromou; Ashish Venkat; Dean M. Tullsen; Rajesh K. Gupta 001 (HPCA, 2018)

Mobilizing the Micro-Ops: Exploiting Context Sensitive Decoding for Security and Energy Efficiency. - Mohammadkazem Taram; Ashish Venkat; Dean M. Tullsen (ISCA, 2018)

Breaking the ISA Barrier in Modern Computing. - Ashish Venkat (2018)

Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization. - Mohammadkazem Taram; Ashish Venkat; Dean M. Tullsen (ASPLOS, 2019)

Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA. - Ashish Venkat; Harsha Basavaraj; Dean M. Tullsen (HPCA, 2019)

Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures. - Andreas Prodromou; Ashish Venkat; Dean M. Tullsen (PMAM@PPoPP, 2019)

Platform-Agnostic Learning-Based Scheduling. - Andreas Prodromou; Ashish Venkat; Dean M. Tullsen (SAMOS, 2019)

Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management. - Mohammadkazem Taram; Ashish Venkat; Dean M. Tullsen (IEEE Micro, 2019)

CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities. - Rasool Sharifi; Ashish Venkat (ISCA, 2020)

Packet Chasing: Spying on Network Packets over a Cache Side-Channel. - Mohammadkazem Taram; Ashish Venkat; Dean M. Tullsen (ISCA, 2020)

I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches. - Xida Ren; Logan Moody; Mohammadkazem Taram; Matthew Jordan; Dean M. Tullsen; Ashish Venkat (ISCA, 2021)

Sieve: Scalable In-situ DRAM-based Accelerator Designs for Massively Parallel k-mer Matching. - Lingxi Wu; Rasool Sharifi; Marzieh Lenjani; Kevin Skadron; Ashish Venkat (ISCA, 2021)

Agon: A Scalable Competitive Scheduler for Large Heterogeneous Systems. - Andreas Prodromou; Ashish Venkat; Dean M. Tullsen (CoRR, 2021)

Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations. - Logan Moody; Wei Qi; Abdolrasoul Sharifi; Layne Berry; Joey Rudek; Jayesh Gaur; Jeff Parkhurst; Sreenivas Subramoney; Kevin Skadron; Ashish Venkat (MICRO, 2022)

SecSMT: Securing SMT Processors against Contention-Based Covert Channels. - Mohammadkazem Taram; Xida Ren; Ashish Venkat; Dean M. Tullsen (USENIX Security Symposium, 2022)

DRAM-CAM: General-Purpose Bit-Serial Exact Pattern Matching. - Lingxi Wu; Rasool Sharifi; Ashish Venkat; Kevin Skadron (IEEE Comput. Archit. Lett., 2022)

Mitigating Speculative Execution Attacks via Context-Sensitive Fencing. - Mohammadkazem Taram; Ashish Venkat; Dean M. Tullsen (IEEE Des. Test, 2022)

Hardware Trojans in eNVM Neuromorphic Devices. - Lingxi Wu; Rahul Sreekumar; Rasool Sharifi; Kevin Skadron; Mircea R. Stan; Ashish Venkat (DATE, 2023)

Special Session: Detecting and Defending Vulnerabilities in Heterogeneous and Monolithic Systems: Current Strategies and Future Directions. - Venkat Nitin Patnala; Sai Manoj Pudukotai Dinakarrao; Guru Venkataramani; Jie Chen 020; Preet Derasari; Milos Doroslovacki; Fan Yao; Hongyu Fang; Meron Demissie; Todd M. Austin; Lauren Biernacki; Saket Upadhyay; et al. (CASES, 2024)

Architectural Modeling and Benchmarking for Digital DRAM PIM. - Farzana Ahmed Siddique; Deyuan Guo; Zhenxing Fan; MohammadHosein Gholamrezaei; Morteza Baradaran; Alif Ahmed; Hugo Abbot; Kyle Durrer; Kumaresh Nandagopal; Ethan Ermovick; Khyati Kiyawat; Beenish Gul; et al. (IISWC, 2024)

Abakus: Accelerating k-mer Counting with Storage Technology. - Lingxi Wu; Minxuan Zhou; Weihong Xu; Ashish Venkat; Tajana Rosing; Kevin Skadron (ACM Trans. Archit. Code Optim., 2024)

Ceviche: Capability-Enhanced Secure Virtualization of Caches. - Arnabjyoti Kalita; Yilong Yang; Alenkruth Krishnan Murali; Ashish Venkat (SP, 2025)

PIMsynth: A Unified Compiler Framework for Bit-Serial Processing-in-Memory Architectures. - Deyuan Guo; MohammadHosein Gholamrezaei; Matthew Hofmann; Ashish Venkat; Zhiru Zhang; Kevin Skadron (IEEE Comput. Archit. Lett., 2025)

Membrane: Accelerating Database Analytics with Bank-Level DRAM-PIM Filtering. - Akhil Shekar; Kevin P. Gaffney; Martin Prammer; Khyati Kiyawat; Lingxi Wu; Helena Caminal; Zhenxing Fan; Yimin Gao; Ashish Venkat; José F. Martínez; Jignesh M. Patel; Kevin Skadron (CoRR, 2025)