EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability. - Ashok Halambi; Peter Grun; Vijay Ganesh 001; Asheesh Khare; Nikil D. Dutt; Alexandru Nicolau (DATE, 1999)

Architecture Exploration of Parameterizable EPIC SOC Architectures. - Ashok Halambi; Radu Cornea; Peter Grun; Nikil D. Dutt; Alexandru Nicolau (DATE, 2000)

Customizing Software Toolkits for Embedded Systems-On-Chip. - Ashok Halambi; Nikil D. Dutt; Alexandru Nicolau (DIPES, 2000)

New directions in compiler technology for embedded systems (embedded tutorial). - Nikil D. Dutt; Alexandru Nicolau; Hiroyuki Tomiyama; Ashok Halambi (ASP-DAC, 2001)

V-SAT: A visual specification and analysis tool for system-on-chip exploration. - Asheesh Khare; Ashok Halambi; Nicolae Savoiu; Peter Grun; Nikil D. Dutt; Alex Nicolau (J. Syst. Archit., 2001)

An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs. - Ashok Halambi; Aviral Shrivastava; Partha Biswas; Nikil D. Dutt; Alexandru Nicolau (DATE, 2002)

A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design . - Alexandru Nicolau; Nikil D. Dutt; Aviral Shrivastava; Partha Biswas; Ashok Halambi (ISSS, 2002)

Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language. - Prabhat Mishra 001; Hiroyuki Tomiyama; Ashok Halambi; Peter Grun; Nikil D. Dutt; Alexandru Nicolau (ASP-DAC/VLSI Design, 2002)

RTGEN-an algorithm for automatic generation of reservation tables from architectural descriptions. - Peter Grun; Ashok Halambi; Nikil D. Dutt; Alexandru Nicolau (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Compilation framework for code size reduction using reduced bit-width ISAs (rISAs). - Aviral Shrivastava; Partha Biswas; Ashok Halambi; Nikil D. Dutt; Alexandru Nicolau (ACM Trans. Design Autom. Electr. Syst., 2006)