Low-Voltage, Double-Edge-Triggered Flip Flop. - Pradeep Varma; Ashutosh Chakraborty (PATMOS, 2003)

Exploiting Cross-Channel Correlation for Energy-Efficient LCD Bus Encoding. - Ashutosh Chakraborty; Enrico Macii; Massimo Poncino (PATMOS, 2005)

Thermal resilient bounded-skew clock tree optimization methodology. - Ashutosh Chakraborty; Prassanna Sithambaram; Karthik Duraisami; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2006)

Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2006)

Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2006)

An integrated nonlinear placement framework with congestion and porosity aware buffer planning. - Tung-Chieh Chen; Ashutosh Chakraborty; David Z. Pan (DAC, 2008)

Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices. - Ashutosh Chakraborty; Sean X. Shi; David Z. Pan (DATE, 2008)

Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (Integr., 2008)

Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2008)

RegPlace: a high quality open-source placement framework for structured ASICs. - Ashutosh Chakraborty; Anurag Kumar 002; David Z. Pan (DAC, 2009)

Analysis and optimization of NBTI induced clock skew in gated clock trees. - Ashutosh Chakraborty; Gokul Ganesan; Anand Rajaram; David Z. Pan (DATE, 2009)

On stress aware active area sizing, gate sizing, and repeater insertion. - Ashutosh Chakraborty; David Z. Pan (ISPD, 2009)

Performance analysis of 3-D monolithic integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Vasilis F. Pavlidis; Giovanni De Micheli (3DIC, 2010)

Stress-driven 3D-IC placement with TSV keep-out zone and regularity study. - Krit Athikulwongse; Ashutosh Chakraborty; Jae-Seok Yang; David Z. Pan; Sung Kyu Lim (ICCAD, 2010)

PASAP: power aware structured ASIC placement. - Ashutosh Chakraborty; David Z. Pan (ISLPED, 2010)

Stress Aware Layout Optimization Leveraging Active Area Dependent Mobility Enhancement. - Ashutosh Chakraborty; Sean X. Shi; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. - Ashutosh Chakraborty; Karthik Duraisami; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Thomas Ernst 005; Olivier Faynot; David Z. Pan; Giovanni De Micheli (ASP-DAC, 2011)

Controlling NBTI degradation during static burn-in testing. - Ashutosh Chakraborty; David Z. Pan (ASP-DAC, 2011)

Reclaiming over-the-IP-block routing resources with buffering-aware rectilinear Steiner minimum tree construction. - Yilin Zhang; Ashutosh Chakraborty; Salim Chowdhury; David Z. Pan (ICCAD, 2012)

Cell transformations and physical design techniques for 3D monolithic integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Giovanni De Micheli (ACM J. Emerg. Technol. Comput. Syst., 2013)

Skew Management of NBTI Impacted Gated Clock Trees. - Ashutosh Chakraborty; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)