A functional silicon compiler for high speed FIR digital filters. - Paul T. Yang; Rajeev Jain; Toshiaki Yoshino; Wanda Gass; Ashwin Shah (ICASSP, 1990)

High-performance BiCMOS 100 K-gate array. - James D. Gallia; Ah-Lyan Yee; Kwok Kit Chau; I-Fay Wang; Harvey Davis; Shobana Swamy; Van M. Nguyen; Kamalesh Natvarlal Ruparel; Kermit Moore; Brian Chae; Carl E. Lemonds; Pat Eyres; et al. (IEEE J. Solid State Circuits, 1990)

A 100-MHz 64-tap FIR digital filter in 0.8- mu m BiCMOS gate array. - Toshiaki Yoshino; Rajeev Jain; Paul T. Yang; Harvey Davis; Wanda Gass; Ashwin Shah (IEEE J. Solid State Circuits, 1990)

Curve-folded form-work for cast, compressive skeletons. - Shajay Bhooshan; Vishu Bhooshan; Ashwin Shah; Henry Louth; David Reeves (SpringSim (SimAUD), 2015)