Utility Aware Snoozy Caches for Energy Efficient Chip Multi-Processors. - Ashwini A. Kulkarni; Shounak Chakraborty 001; Shrinivas P. Mahajan; Hemangee K. Kapoor (ACM Great Lakes Symposium on VLSI, 2018)

Towards Analysing the Effect of Snoozy Caches on the Temperature of Tiled Chip Multi-Processors. - Ashwini A. Kulkarni; Chirag Joshi; Khushboo Rani; Sukarn Agarwal; Shrinivas P. Mahajan; Hemangee K. Kapoor (ISED, 2018)

Towards Analysing the Effect of Hybrid Caches on the Temperature of Tiled Chip Multi-Processors. - Ashwini A. Kulkarni; Khushboo Rani; Sukarn Agarwal; Shrinivas P. Mahajan; Hemangee K. Kapoor (iSES, 2018)

Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessors. - Chirag Joshi; Palash Das; Ashwini A. Kulkarni; Hemangee K. Kapoor (ACM Great Lakes Symposium on VLSI, 2020)