Multistage bus network (MBN): an interconnection network for cache coherent multiprocessors. - Laxmi N. Bhuyan; Ashwini K. Nanda (SPDP, 1991)

Analysis of Directory Based Cache Coherence Schemes with Multistage Networks. - Ashwini K. Nanda; Hong Jiang (ACM Conference on Computer Science, 1992)

Scheduling Directed Task Graphs on Multiprocessors Using Simulated Annealing. - Ashwini K. Nanda; Doug DeGroot; Daniel L. Stenger (ICDCS, 1992)

A Formal Specification and Verification Technique for Cache Coherence Protocols. - Ashwini K. Nanda; Laxmi N. Bhuyan (ICPP (1), 1992)

Mapping Applications onto a Cache Coherent Multiprocessor. - Ashwini K. Nanda; Laxmi N. Bhuyan (SC, 1992)

Efficient Mapping of Applications on Cache Based Multiprocessors. - Ashwini K. Nanda; Laxmi N. Bhuyan (J. Parallel Distributed Comput., 1993)

Design and Analysis of Cache Coherent Multistage Interconnection Networks. - Ashwini K. Nanda; Laxmi N. Bhuyan (IEEE Trans. Computers, 1993)

Performance and Reliability of the Multistage Bus Network. - Laxmi N. Bhuyan; Ashwini K. Nanda; Tahsin Askar (ICPP (1), 1994)

Energy optimization of multi-level processor cache architectures. - Uming Ko; Poras T. Balsara; Ashwini K. Nanda (ISLPD, 1995)

Integrating a Misprediction Recovery Cache (MRC) into a Superscalar Pipeline. - James O. Bondi; Ashwini K. Nanda; Simonjit Dutta (MICRO, 1996)

Accuracy and Speedup of Parallel Trace-Driven Architectural Simulation. - Anthony-Trung Nguyen; Pradip Bose; Kattamuri Ekanadham; Ashwini K. Nanda; Maged M. Michael (IPPS, 1997)

Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors. - Maged M. Michael; Ashwini K. Nanda; Beng-Hong Lim; Michael L. Scott (ISCA, 1997)

Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor. - Laxmi N. Bhuyan; Ravi R. Iyer 001; Tahsin Askar; Ashwini K. Nanda; Mohan Kumar (IEEE Trans. Parallel Distributed Syst., 1997)

The Design of COMPASS: An Execution Driven Simulator for Commercial Applications Running on Shared Memory Multiprocessors. - Ashwini K. Nanda; Yiming Hu; Moriyoshi Ohara; Caroline Benveniste; Mark Giampapa; Maged M. Michael (IPPS/SPDP, 1998)

The Misprediction Recovery Cache. - Ashwini K. Nanda; James O. Bondi; Simonjit Dutta (Int. J. Parallel Program., 1998)

Energy optimization of multilevel cache architectures for RISC and CISC processors. - Uming Ko; Poras T. Balsara; Ashwini K. Nanda (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Second Workshop on Computer Architecture Evaluation Using Commercial Workloads. - Russell M. Clapp; Ashwini K. Nanda; Josep Torrellas (HPCA, 1999)

Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors. - Maged M. Michael; Ashwini K. Nanda (HPCA, 1999)

Coherence Controller Architectures for Scalable Shared-Memory Multiprocessors. - Maged M. Michael; Ashwini K. Nanda; Beng-Hong Lim (IEEE Trans. Computers, 1999)

MemorIES: A Programmable, Real-Time Hardware Emulation Tool for Multiprocessor Server Design. - Ashwini K. Nanda; Kwok-Ken Mak; Krishnan Sugavanam; Ramendra K. Sahoo; Vijayaraghavan Soundararajan; T. Basil Smith (ASPLOS, 2000)

High-Throughput Coherence Controllers. - Ashwini K. Nanda; Anthony-Trung Nguyen; Maged M. Michael; Douglas J. Joseph (HPCA, 2000)

Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors. - Ravi R. Iyer 001; Laxmi N. Bhuyan; Ashwini K. Nanda (IPDPS, 2000)

High-throughout coherence control and hardware messaging in Everest. - Ashwini K. Nanda; Anthony-Trung Nguyen; Maged M. Michael; Douglas J. Joseph (IBM J. Res. Dev., 2001)

Measurement, Analysis and Performance Improvement of the Apache Web Server. - Yiming Hu; Ashwini K. Nanda; Qing Yang 001 (Int. J. Comput. Their Appl., 2001)

Shared cache architectures for decision support systems. - Michel Dubois 001; Jaeheon Jeong; Ashwini K. Nanda (Perform. Evaluation, 2002)

Guest Editors' Introduction: Evaluating Servers with Commercial Workloads. - Kimberly Keeton; Russell M. Clapp; Ashwini K. Nanda (Computer, 2003)

High-performance server systems and the next generation of online games. - Bruce D'Amora; Ashwini K. Nanda; Karen A. Magerlein; Atman Binstock; Bernard Yee (IBM Syst. J., 2006)

Preface. - H. Peter Hofstee; Ashwini K. Nanda; John J. Ritsko (IBM J. Res. Dev., 2007)

Speech recognition systems on the Cell Broadband Engine processor. - Yang Liu; Holger Jones; Sheila Vaidya; Michael Perrone; Borivoj Tydlitát; Ashwini K. Nanda (IBM J. Res. Dev., 2007)

Cell/B.E. blades: Building blocks for scalable, real-time, interactive, and digital media servers. - Ashwini K. Nanda; J. Randal Moulic; Robert E. Hanson; Gottfried Goldrian; Michael N. Day; Bruce D. D'Amora; Sreeni Kesavarapu (IBM J. Res. Dev., 2007)

Comparative Analysis of Machine Learning and Deep Learning Models for Classifying Squamous Epithelial Cells of the Cervix. - Subhasish Das; Satish K. Panda; Madhusmita Sethy; Prajna Paramita Giri; Ashwini K. Nanda (CoRR, 2024)