A 48 by 48 CNN chip operating with B/W images. - Ari Paasio; Asko Kananen; Kari Halonen; Veikko Porra (ICECS, 1998)

Very fast and compact fixed template CNN realizations for B/W processing. - Ari Paasio; Asko Kananen; Kari Halonen (ISCAS (5), 1999)

A QCIF Resolution Binary I/O CNN-UM Chip. - Ari Paasio; Asko Kananen; Kari Halonen; Veikko Porra (J. VLSI Signal Process., 1999)

Discrete time analog polynomial type CNN with digital state. - Mika Laiho; Ari Paasio; Asko Kananen; Kari Halonen (ISCAS (3), 2001)

Cell and network level design of a mixed-mode CNN. - Mika Laiho; Ari Paasio; Asko Kananen; Kari Halonen (ISCAS (1), 2002)

CNN applications from the hardware point of view: video sequence segmentation. - Asko Kananen; Ari Paasio; Mika Laiho; Kari Halonen (Int. J. Circuit Theory Appl., 2002)

A mixed-mode polynomial-type CNN for analysing brain electrical activity in epilepsy. - Mika Laiho; Ari Paasio; Asko Kananen; Kari Halonen (Int. J. Circuit Theory Appl., 2002)

High speed cellular array computer realizations for low power applications. - Mika Laiho; Asko Kananen; Ari Paasio; Kari Halonen (IJCNN, 2003)

A 32×32 cellular test chip targeting new functionalities. - Ari Paasio; Mika Laiho; Asko Kananen; Kari Halonen; Jonne Poikonen (ISCAS (3), 2003)

Realization of Couplings in a Polynomial Type Mixed-Mode Cellular Neural Network. - Mika Laiho; Ari Paasio; Asko Kananen; Kari Halonen (Int. J. Neural Syst., 2003)

N × 16 cellular test chips for low-pass filtering large images. - Asko Kananen; Mika Laiho; Kari Halonen; Ari Paasio (ISCAS (5), 2004)

A mixed-mode polynomial cellular array processor hardware realization. - Mika Laiho; Ari Paasio; Asko Kananen; Kari Halonen (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

A simple variable λ resistive network implementation. - Asko Kananen; Ari Paasio; Kari Halonen (ECCTD, 2005)