Reliability- and process variation-aware placement for FPGAs. - Assem A. M. Bsoul; Naraig Manjikian; Li Shang (DATE, 2010)

An FPGA architecture supporting dynamically controlled power gating. - Assem A. M. Bsoul; Steven J. E. Wilton (FPT, 2010)

A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs. - Assem A. M. Bsoul; Steven J. E. Wilton (FPGA, 2012)

An FPGA with power-gated switch blocks. - Assem A. M. Bsoul; Steven J. E. Wilton (FPT, 2012)

Implementation of an FPGA-based low-power video processing module for a head-mounted display system. - Assem A. M. Bsoul; Reynald Hoskinson; Milen Ivanov; Shahriar Mirabbasi; Hamid Abdollahi (ICCE, 2013)

High-level synthesis-based design methodology for Dynamic Power-Gated FPGAs. - Rehan Ahmed; Assem A. M. Bsoul; Steven J. E. Wilton; Peter Hallschmid; Richard Klukas (FPL, 2014)

A Configurable Architecture to Limit Inrush Current in Power-Gated Reconfigurable Devices. - Assem A. M. Bsoul; Steven J. E. Wilton (J. Low Power Electron., 2014)

An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating. - Assem A. M. Bsoul; Steven J. E. Wilton; Kuen Hung Tsoi; Wayne Luk (IEEE Trans. Very Large Scale Integr. Syst., 2016)