Asuncion Perez-Pascual

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2012

Modified Shuffled Based Architecture for High-Throughput Decoding of LDPC Codes.

[BibT_eX]

[DOI]

Fabian Angarita

J. Signal Process. Syst., 2012

Fully-parallel LUT-based (2048, 1723) LDPC code decoder for FPGA.

[BibT_eX]

[DOI]

Vicente Torres-Carot

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

High-throughput FPGA-based emulator for structured LDPC codes.

[BibT_eX]

[DOI]

Fabian Angarita

Vicente Torres-Carot

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2009

Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2009

Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2009

FPGA-implementation of Time-Multiplexed Multiple Constant Multiplication based on carry-save arithmetic.

[BibT_eX]

[DOI]

Roberto Gutierrez

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2008

2007

Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2007

FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices.

[BibT_eX]

[DOI]

IEEE Trans. Educ., 2007

Design of an efficient digital down-converter for a SDR-based DVB-S receiver.

[BibT_eX]

[DOI]

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006

The use of CORDIC in software defined radios: a tutorial.

[BibT_eX]

[DOI]

Vicente Torres

Vicenç Almenar

IEEE Commun. Mag., 2006

Design of high performance timing recovery loops for communication applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

2005

Efficient FPGA Implementation of CORDIC Algorithm for Circular and Linear Coordinates.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2003

DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems.

[BibT_eX]

[DOI]

José Marín-Roig

Vicente Torres-Carot

Ma José Canet

Francisco Cardells-Tormo

Fabian Angarita

Felip Vicedo

Vicenc Almenar-Terre

Javier Valls-Coquillat

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002

FPGA-based radix-4 butterflies for HIPERLAN/2.

[BibT_eX]

[DOI]

T. Sansaloni

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Distributed arithmetic radix-2 butterflies for FPGA.

[BibT_eX]

[DOI]

T. Sansaloni

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

FPGA based on-line complex-number multipliers.

[BibT_eX]

[DOI]

T. Sansaloni

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

1999

Efficient complex-number multipliers mapped on FPGA.

[BibT_eX]

[DOI]