SCOC IP Cores for Custom Built Supercomputing Nodes. - Nagarajan Venkateswaran; Rajagopal Hariharan; Vinesh Srinivasan; Ram Srivatsa Kannan; Prashanth Thinakaran; Vigneshwaran Sankaran; Bharanidharan Vasudevan; Ravindhiran Mukundrajan; Nachiappan Chidambaram Nachiappan; Aswin Sridharan; Karthikeyan P. Saravanan; Vignesh Adhinarayanan; et al. (ISVLSI, 2012)

Compilation Accelerator on Silicon. - Nagarajan Venkateswaran; Vinesh Srinivasan; Ram Srivatsa Kannan; Prashanth Thinakaran; Rajagopal Hariharan; Bharanidharan Vasudevan; Nachiappan Chidambaram Nachiappan; Karthikeyan P. Saravanan; Aswin Sridharan; Vigneshwaran Sankaran; Vignesh Adhinarayanan; V. S. Vignesh; et al. (ISVLSI, 2012)

Performance and energy efficient cache system design: Simultaneous execution of multiple applications on heterogeneous cores. - Nagarajan Venkateswaran; Kartik Lakshminarasimhan; Akash Sridhar; Prashanth Thinakaran; Rajagopal Hariharan; Vinesh Srinivasan; Ram Srivatsa Kannan; Aswin Sridharan (ISVLSI, 2013)