Space Efficient Reachability Analysis Through Use of Pseudo-Root States. - Atanas N. Parashkevov; Jay Yantchev (TACAS, 1997)

Automated equivalence checking of switch level circuits . - Simon Jolly; Atanas N. Parashkevov; Tim McDougall (DAC, 2002)

An automated method for test model generation from switch level circuits. - Tim McDougall; Atanas N. Parashkevov; Simon Jolly; Juhong Zhu; Jing Zeng; Carol Pyron; Magdy S. Abadir (ASP-DAC, 2003)

Coverage Measurement for Software Application Level Verification using Symbolic Trajectory Evaluation Techniques. - Adriel Cheng; Atanas N. Parashkevov; Cheng-Chew Lim (DELTA, 2004)

A software test program generator for verifying system-on-chips. - Adriel Cheng; Cheng-Chew Lim; Atanas N. Parashkevov (HLDVT, 2005)

Coverage Measurement for Software Application Testing using Partially Ordered Domains and Symbolic Trajectory Evaluation Techniques. - Adriel Cheng; Atanas N. Parashkevov; Cheng-Chew Lim (DELTA, 2006)

Virtualization Based Development. - Jay Yantchev; Atanas N. Parashkevov (Concurrency, Security, and Puzzles, 2017)