Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA. - Eduardo Picatoste-Olloqui; Francisco Cardells-Tormo; Jordi Sempere-Agulló; Atilà Herms-Berenguer (FPL, 2004)

Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA. - Marc Bautista-Palacios; Luis Baldez; Jordi Sempere-Agulló; Atilà Herms-Berenguer; Francisco Cardells-Tormo; Pep-Lluis Molinet (FPL, 2005)