Fast motion estimation algorithm and low-power CMOS motion estimation array LSI for MPEG-2 encoding. - Tadayoshi Enomoto; Yasumasa Sasajima; Atsunori Hirobe; Tetsuya Ohsawa (ISCAS (4), 1999)

A 250-Mb/s/pin, 1-Gb double-data-rate SDRAM with a bidirectional delay and an interbank shared redundancy scheme. - Yasuhiro Takai; Mamoru Fujita; Kyoichi Nagata; Satoshi Isa; Shigeyuki Nakazawa; Atsunori Hirobe; Hiroaki Ohkubo; Masato Sakao; Shinichi Horiba; Tadashi Fukase; Yoshihiro Takaishi; Makoto Matsuo; et al. (IEEE J. Solid State Circuits, 2000)