Look Up Table Compaction Based on Folding of Logic Functions. - Shinji Kimura; Atsushi Ishii; Takashi Horiyama; Masaki Nakanishi; Hirotsugu Kajihara; Katsumasa Watanabe (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Personalized Education Environment Considering Progress in C Programming Skill Acquisition. - Hiroshi Taguchi; Hiromitsu Shimakawa; Atsushi Ishii (C5, 2004)

A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die. - Shigeki Ohbayashi; Makoto Yabuuchi; Kazushi Kono; Yuji Oda; Susumu Imaoka; Keiichi Usui; Toshiaki Yonezu; Takeshi Iwamoto; Koji Nii; Yasumasa Tsukamoto; Masashi Arakawa; Takahiro Uchida; et al. (ISSCC, 2007)

A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die. - Shigeki Ohbayashi; Makoto Yabuuchi; Kazushi Kono; Yuji Oda; Susumu Imaoka; Keiichi Usui; Toshiaki Yonezu; Takeshi Iwamoto; Koji Nii; Yasumasa Tsukamoto; Masashi Arakawa; Takahiro Uchida; et al. (IEEE J. Solid State Circuits, 2008)

Elastic Stream Computing with Clouds. - Atsushi Ishii; Toyotaro Suzumura (IEEE CLOUD, 2011)

Manufacture and Performance of a 60GHz-Band High-Efficiency Antenna with a Thick Resin Layer and the Feed through a Hole in a Silicon Chip. - Jun Asano; Jiro Hirokawa; Hiroshi Nakano; Yasutake Hirachi; Hiroshi Isono; Atsushi Ishii; Makoto Ando (IEICE Trans. Commun., 2013)

A 60GHz-Band High-Efficiency Antenna with a Thick Resin Layer and Differentially Fed through a Hole in a Silicon Chip. - Naoya Oikawa; Jiro Hirokawa; Hiroshi Nakano; Yasutake Hirachi; Hiroshi Isono; Atsushi Ishii; Makoto Ando (IEICE Trans. Commun., 2016)