Neural network simulator for spatiotemporal pattern analysis. - Atsushi Kamo; Hiroshi Ninomiya; Teru Yoneyama; Hideki Asai (ICECS, 1998)

Expanded GMC for transient analysis of transmission line networks. - Atsushi Kamo; Takayuki Watanabe; Hideki Asai (ISCAS (6), 1999)

Simulation for the optimal placement of decoupling capacitors on printed circuit board. - Atsushi Kamo; Takayuki Watanabe; Hideki Asai (ISCAS (3), 2001)

High-speed interconnect simulation using MIMO type of adaptive least square method. - Masaya Suzuki; Hirofumi Miyashita; Atsushi Kamo; Takayuki Watanabe; Hideki Asai (ISCAS (5), 2001)

Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method. - I. Hattori; Atsushi Kamo; Takayuki Watanabe; Hideki Asai (ISCAS (5), 2002)

Noise analysis of power/ground planes on PCB by SPICE-like simulator with model order reduction technique. - Hidemasa Kubota; Atsushi Kamo; Takayuki Watanabe; Hideki Asai (ISCAS (5), 2002)

An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique. - Hidemasa Kubota; Atsushi Kamo; Takayuki Watanabe; Hideki Asai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain. - Kenichi Suzuki; Mitsuhiro Takeda; Atsushi Kamo; Hideki Asai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits. - Takashi Mine; Hidemasa Kubota; Atsushi Kamo; Takayuki Watanabe; Hideki Asai (DATE, 2004)

Modified hybrid reduction technique for the simulation of linear/nonlinear mixed circuits. - Takashi Mine; Hidemasa Kubota; Atsushi Kamo; Takayuki Watanabe; Hideki Asai (ISCAS (5), 2005)

Basic Study on Airbag-based Stationary Type Bracing System for Treatment of Scoliosis. - Atsushi Kamo; Akira Uehara; Hiroaki Kawamoto; Yoshiyuki Sankai (SII, 2025)