A high-density data-path generator with stretchable cells. - Yoshiki Tsujihashi; Hisashi Matsumoto; Hidekatsu Nishimaki; Atsushi Miyanishi; Hiroomi Nakao; Osamu Kitada; Shuhei Iwade; Shinpei Kayano; Masayoshi Sakao (IEEE J. Solid State Circuits, 1994)

A 5.3-GB/s embedded SDRAM core with slight-boost scheme. - Akira Yamazaki; Tadato Yamagata; Makoto Hatakenaka; Atsushi Miyanishi; Isao Hayashi; Shigeki Tomishima; Atsuo Mangyo; Yoshio Yukinari; Takashi Tatsumi; Masashi Matsumura; Kazutami Arimoto; Michihiro Yamada (IEEE J. Solid State Circuits, 1999)

40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of -40 to 170°C with test screening against write disturb issues. - Yoshisato Yokoyama; Yuichiro Ishii; Koji Tanaka; Tatsuya Fukuda; Yoshiki Tsujihashi; Atsushi Miyanishi; Shinobu Asayama; Keiichi Maekawa; Kazutoshi Shiba; Koji Nii (A-SSCC, 2014)

40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU. - Yoshisato Yokoyama; Yuichiro Ishii; Hidemitsu Kojima; Atsushi Miyanishi; Yoshiki Tsujihashi; Shinobu Asayama; Kazutoshi Shiba; Koji Tanaka; Tatsuya Fukuda; Koji Nii; Kazumasa Yanagisawa (ISQED, 2014)