A 21 V output charge pump circuit with appropriate well-bias supply technique in 0.18 μm Si CMOS. - Atsushi Shirane; Hiroyuki Ito; Noboru Ishihara; Kazuya Masu (ISOCC, 2011)

A process-scalable RF transmitter using 90nm and 65nm Si CMOS. - Atsushi Shirane; Hiroyuki Ito; Noboru Ishihara; Kazuya Masu (VLSI-DAT, 2013)

13.8 A 5.8GHz RF-powered transceiver with a 113μW 32-QAM transmitter employing the IF-based quadrature backscattering technique. - Atsushi Shirane; Haowei Tan; Yiming Fang; Taiki Ibe; Hiroyuki Ito; Noboru Ishihara; Kazuya Masu (ISSCC, 2015)

RF-Powered Transceiver With an Energy- and Spectral-Efficient IF-Based Quadrature Backscattering Transmitter. - Atsushi Shirane; Yiming Fang; Haowei Tan; Taiki Ibe; Hiroyuki Ito; Noboru Ishihara; Kazuya Masu (IEEE J. Solid State Circuits, 2015)

A low voltage 0.8V RF receiver in 28nm CMOS for 5GHz WLAN. - Atsushi Shirane; Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Toshiya Mitomo; Hiroyuki Kobayashi; Hiroshi Yoshida; Hideaki Majima; Ryuichi Fujimoto; Hiroshi Tsurumi (ESSCIRC, 2017)

A 28.16-Gb/s Area-Efficient 60GHz CMOS Bi-Directional Transceiver for IEEE 802.11ay. - Jian Pang; Korkut Kaan Tokgoz; Shotaro Maki; Zheng Li 021; Xueting Luo; Ibrahim Abdo; Seitarou Kawai; Hanli Liu; Bangan Liu; Makihiko Katsuragi; Kento Kimura; Atsushi Shirane; et al. (A-SSCC, 2018)

An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator based Frequency Synthesizer and Digital Background EVM Calibration. - Bangan Liu; Yuncheng Zhang; Junjun Qiu; Wei Deng 001; Zule Xu; Haosheng Zhang; Jian Pang; Yun Wang 008; Rui Wu 001; Teruki Someya; Atsushi Shirane; Kenichi Okada 001 (CICC, 2019)

A 78 fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO. - Zheng Sun 001; Hanli Liu; Dingxin Xu; Hongye Huang; Bangan Liu; Zheng Li 021; Jian Pang; Teruki Someya; Atsushi Shirane (ESSCIRC, 2019)

A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS. - Hanli Liu; Zheng Sun 001; Hongye Huang; Wei Deng 001; Teerachot Siriburanon; Jian Pang; Yun Wang 008; Rui Wu 001; Teruki Someya; Atsushi Shirane; Kenichi Okada 001 (ISSCC, 2019)

A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR. - Jian Pang; Zheng Li 021; Ryo Kubozoe; Xueting Luo; Rui Wu 001; Yun Wang 008; Dongwon You; Ashbir Aviat Fadila; Rattanan Saengchan; Takeshi Nakamura; Joshua Alvin; Daiki Matsumoto; et al. (ISSCC, 2019)

Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping. - Haosheng Zhang; Hans Herdian; Aravind Tharayil Narayanan; Atsushi Shirane; Mitsuru Suzuki; Kazuhiro Harasaka; Kazuhiko Adachi; Shinya Yanagimachi; Kenichi Okada 001 (ISSCC, 2019)

0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur. - Haosheng Zhang; Aravind Tharayil Narayanan; Hans Herdian; Bangan Liu; Yun Wang 008; Atsushi Shirane; Kenichi Okada 001 (VLSI Circuits, 2019)

A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock. - Haosheng Zhang; Aravind Tharayil Narayanan; Hans Herdian; Bangan Liu; Rui Wu 001; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2019)

A 265- $ mu$ W Fractional- ${N}$ Digital PLL With Seamless Automatic Switching Sub-Sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65-nm CMOS. - Hanli Liu; Atsushi Shirane; Kenichi Okada 001; Zheng Sun 001; Hongye Huang; Wei Deng 001; Teerachot Siriburanon; Jian Pang; Yun Wang 008; Rui Wu 001; Teruki Someya (IEEE J. Solid State Circuits, 2019)

A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance. - Jian Pang; Shotaro Maki; Seitarou Kawai; Noriaki Nagashima; Yuuki Seo; Masato Dome; Hisashi Kato; Makihiko Katsuragi; Kento Kimura; Satoshi Kondo; Yuki Terashima; Hanli Liu; et al. (IEEE J. Solid State Circuits, 2019)

A 28-GHz CMOS Phased-Array Transceiver Based on LO Phase-Shifting Architecture With Gain Invariant Phase Tuning for 5G New Radio. - Jian Pang; Rui Wu 001; Yun Wang 008; Masato Dome; Hisashi Kato; Hongye Huang; Aravind Tharayil Narayanan; Hanli Liu; Bangan Liu; Takeshi Nakamura; Takuya Fujimura; Masaru Kawabuchi; et al. (IEEE J. Solid State Circuits, 2019)

ULPAC: A Miniaturized Ultralow-Power Atomic Clock. - Haosheng Zhang; Hans Herdian; Aravind Tharayil Narayanan; Atsushi Shirane; Mitsuru Suzuki; Kazuhiro Harasaka; Kazuhiko Adachi; Shigeyoshi Goka; Shinya Yanagimachi; Kenichi Okada 001 (IEEE J. Solid State Circuits, 2019)

A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR. - Zheng Li 021; Jian Pang; Ryo Kubozoe; Xueting Luo; Rui Wu 001; Yun Wang 008; Dongwon You; Ashbir Aviat Fadila; Joshua Alvin; Bangan Liu; Zheng Sun 001; Hongye Huang; et al. (ASP-DAC, 2020)

A Compact 37-40GHz CMOS Switch-Type Phase Shifter with Fine-Tuning Stage Achieving 0.4-dB RMS Gain Error. - Jian Pang; Xueting Luo; Zheng Li 021; Atsushi Shirane; Kenichi Okada 001 (ICTA, 2020)

Wireless Devices Identification with Light-Weight Convolutional Neural Network Operating on Quadrant IQ Transition Image. - Hiro Tamura; Kiyoshi Yanagisawa; Atsushi Shirane; Kenichi Okada 001 (NEWCAS, 2020)

A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation. - Jian Pang; Zheng Li 021; Xueting Luo; Joshua Alvin; Rattanan Saengchan; Ashbir Aviat Fadila; Kiyoshi Yanagisawa; Yi Zhang 092; Zixin Chen; Zhongliang Huang; Xiaofan Gu; Rui Wu 001; et al. (VLSI Circuits, 2020)

A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL. - Yuncheng Zhang; Bangan Liu; Xiaofan Gu; Chun Wang; Kiyoshi Yanagisawa; Junjun Qiu; Yun Wang 008; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (VLSI Circuits, 2020)

A 28-GHz CMOS Vector-Summing Phase Shifter Featuring I/Q Imbalance Calibration Supporting 11.2Gb/s in 256QAM for 5G New Radio. - Jian Pang; Ryo Kubozoe; Zheng Li 021; Masaru Kawabuchi; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2020)

A Compact TF-Based LC-VCO with Ultra-Low-Power Operation and Supply Pushing Reduction for IoT Applications. - Zheng Sun 001; Dingxin Xu; Hongye Huang; Zheng Li 021; Hanli Liu; Bangan Liu; Jian Pang; Teruki Someya; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2020)

300-GHz-Band 120-Gb/s Wireless Front-End Based on InP-HEMT PAs and Mixers. - Hiroshi Hamada; Takuya Tsutsumi; Hideaki Matsuzaki; Takuya Fujimura; Ibrahim Abdo; Atsushi Shirane; Kenichi Okada 001; Go Itami; Ho-Jin Song; Hiroki Sugiyama; Hideyuki Nosaka (IEEE J. Solid State Circuits, 2020)

A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR. - Jian Pang; Zheng Li 021; Ryo Kubozoe; Xueting Luo; Rui Wu 001; Yun Wang 008; Dongwon You; Ashbir Aviat Fadila; Rattanan Saengchan; Takeshi Nakamura; Joshua Alvin; Daiki Matsumoto; et al. (IEEE J. Solid State Circuits, 2020)

A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS. - Yun Wang 008; Rui Wu 001; Jian Pang; Dongwon You; Ashbir Aviat Fadila; Rattanan Saengchan; Xi Fu; Daiki Matsumoto; Takeshi Nakamura; Ryo Kubozoe; Masaru Kawabuchi; Bangan Liu; et al. (IEEE J. Solid State Circuits, 2020)

A 0.41W 34Gb/s 300GHz CMOS Wireless Transceiver. - Ibrahim Abdo; Takuya Fujimura; Tsuyoshi Miura; Korkut Kaan Tokgoz; Atsushi Shirane; Kenichi Okada 001 (ASP-DAC, 2021)

A High Accuracy Phase and Amplitude Detection Circuit for Calibration of 28GHz Phased Array Beamformer System. - Joshua Alvin; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ASP-DAC, 2021)

A DSM-based Polar Transmitter with 23.8% System Efficiency. - Yuncheng Zhang; Bangan Liu; Xiaofan Gu; Chun Wang; Atsushi Shirane; Kenichi Okada 001 (ASP-DAC, 2021)

28GHz Phase Shifter with Temperature Compensation for 5G NR Phased-array Transceiver. - Yi Zhang 092; Jian Pang; Kiyoshi Yanagizawa; Atsushi Shirane; Kenichi Okada 001 (ASP-DAC, 2021)

A 0.25 mm2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration. - Zheng Sun 001; Dingxin Xu; Junjun Qiu; Zezheng Liu; Yuncheng Zhang; Hongye Huang; Hanli Liu; Bangan Liu; Zheng Li 021; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2021)

Dual-Layer Proton Irradiation for Creating Thermally-Stable High-Resistivity Region in Si CMOS Substrate. - Hans Herdian; Takeshi Inoue; Takuichi Hirano; Masatsugu Sogabe; Atsushi Shirane; Kenichi Okada 001 (ESSDERC, 2021)

A 28GHz Bi-direction Transceiver with Temperature Compensation. - Yi Zhang 092; Jian Pang; Zheng Li 021; Atsushi Shirane; Kenichi Okada 001 (ICTA, 2021)

A 39GHz Divide-by-8 LC-Ring ILFD Designed for 5G New Radio n260 Band. - Yudai Yamazaki; Joshua Alvin; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ICTA, 2021)

22.2 A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS. - Ibrahim Abdo; Carrel da Gomez; Chun Wang; Kota Hatano; Qi Li; Chenxin Liu; Kiyoshi Yanagisawa; Ashbir Aviat Fadila; Jian Pang; Hiroshi Hamada; Hideyuki Nosaka; Atsushi Shirane; et al. (ISSCC, 2021)

32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth. - Junjun Qiu; Zheng Sun 001; Bangan Liu; Wenqian Wang; Dingxin Xu; Hans Herdian; Hongye Huang; Yuncheng Zhang; Yun Wang 008; Atsushi Shirane; Kenichi Okada 001 (ISSCC, 2021)

A Fast-Beam-Switching 28-GHz Phased-Array Transceiver Supporting Cross-Polarization Leakage Self-Cancellation. - Jian Pang; Zheng Li 021; Xueting Luo; Joshua Alvin; Kiyoshi Yanagisawa; Yi Zhang 092; Zixin Chen; Zhongliang Huang; Xiaofan Gu; Weichu Chen; Yun Wang 008; Dongwon You; et al. (VLSI Circuits, 2021)

64QAM wireless link with 300GHz InP-CMOS hybrid transceiver. - Ibrahim Abdo; Hiroshi Hamada; Hideyuki Nosaka; Atsushi Shirane; Kenichi Okada 001 (IEICE Electron. Express, 2021)

A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems. - Jian Pang; Zheng Li 021; Xueting Luo; Joshua Alvin; Rattanan Saengchan; Ashbir Aviat Fadila; Kiyoshi Yanagisawa; Yi Zhang 092; Zixin Chen; Zhongliang Huang; Xiaofan Gu; Rui Wu 001; et al. (IEEE J. Solid State Circuits, 2021)

A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth. - Junjun Qiu; Zheng Sun 001; Bangan Liu; Wenqian Wang; Dingxin Xu; Hans Herdian; Hongye Huang; Yuncheng Zhang; Yun Wang 008; Jian Pang; Hanli Liu; Masaya Miyahara; et al. (IEEE J. Solid State Circuits, 2021)

A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration. - Bangan Liu; Yuncheng Zhang; Junjun Qiu; Huy Cu Ngo; Wei Deng 001; Kengo Nakata; Toru Yoshioka; Jun Emmei; Jian Pang; Aravind Tharayil Narayanan; Haosheng Zhang; Teruki Someya; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 0.85mm2 BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry With T/R Switch. - Zheng Sun 001; Hanli Liu; Hongye Huang; Dexian Tang; Dingxin Xu; Tohru Kaneko; Zheng Li 021; Jian Pang; Rui Wu 001; Wei Deng 001; Atsushi Shirane; Kenichi Okada 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 220-294 GHz Power Amplifier with 10-dBm Psat and 2.2% PAE in 250-nm InP DHBT. - Teruo Jyo; Hiroshi Hamada; Munehiko Nagatani; Hitoshi Wakita; Ibrahim Abdo; Miwa Mutoh; Yuta Shiratori; Kenichi Okada 001; Atsushi Shirane; Hiroyuki Takahashi (BCICTS, 2022)

A CMOS Full-Wave Switching Rectifier with Frequency Up-Down Conversion for 5G NR Wirelessly-Powered Relay Transceivers. - Sena Kato; Keito Yuasa; Michihiro Ide; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2022)

A 28GHz Area-Efficient CMOS Vector-Summing Phase Shifter Utilizing Phase-Inverting Type-I Poly-Phase Filter for 5G New Radio. - Minzhe Tang; Yi Zhang 092; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2022)

A 1.8-67GHz Divide-by-4 ILFD Using Area-Efficient Transformer-Based Injection-Enhancing Technique. - Yudai Yamazaki; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2022)

A 41-GHz 19.4-dBm PSATCMOS Doherty Power Amplifier for 5G NR Applications. - Zheng Li 021; Zixin Chen; Qiaoyu Wang; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ICTA, 2022)

A 3.4mW/element Radiation-Hardened Ka-Band CMOS Phased-Array Receiver Utilizing Magnetic-Tuning Phase Shifter for Small Satellite Constellation. - Xi Fu; Yun Wang 008; Dongwon You; Xiaolin Wang; Ashbir Aviat Fadila; Yi Zhang 092; Sena Kato; Chun Wang; Zheng Li 021; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ISSCC, 2022)

A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR. - Jian Pang; Yi Zhang 092; Zheng Li 021; Minzhe Tang; Yijing Liao; Ashbir Aviat Fadila; Atsushi Shirane; Kenichi Okada 001 (ISSCC, 2022)

Millimeter-Wave CMOS Phased-Array Transceivers for 5G and Beyond. - Kenichi Okada 001; Jian Pang; Atsushi Shirane; Zheng Li 021; Yi Zhang 092; Naoki Oshima; Shinichi Hori; Kazuaki Kunihiro (PIMRC, 2022)

A 28-GHz Fully-Passive Retro-Reflective Phased-Array Backscattering Transceiver for 5G Network with 24-GHz Beam-Steered Wireless Power Transfer. - Michihiro Ide; Yuasa Keito; Sena Kato; Dongwon You; Ashbir Aviat Fadila; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (VLSI Technology and Circuits, 2022)

A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station. - Zheng Li 021; Jian Pang; Yi Zhang 092; Yudai Yamazaki; Qiaoyu Wang; Peng Luo; Weichu Chen; Yijing Liao; Minzhe Tang; Zhengyan Guo; Yun Wang 008; Xi Fu; et al. (VLSI Technology and Circuits, 2022)

A low-power digital baseband circuit for GMSK demodulation in sub-GHz application. - Junjun Qiu; Bangan Liu; Yuncheng Zhang; Atsushi Shirane; Kenichi Okada 001 (IEICE Electron. Express, 2022)

Performance Evaluation of Classification and Verification with Quadrant IQ Transition Image. - Hiro Tamura; Kiyoshi Yanagisawa; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Commun., 2022)

F-band Frequency Multipliers with Fundamental and Harmonic Rejection for Improved Conversion Gain and Output Power. - Ibrahim Abdo; Korkut Kaan Tokgoz; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2022)

A Compact and High-Resolution CMOS Switch-Type Phase Shifter Achieving 0.4-dB RMS Gain Error for 5G n260 Band. - Jian Pang; Xueting Luo; Zheng Li 021; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2022)

A 0.37mm2 Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components. - Yuncheng Zhang; Bangan Liu; Teruki Someya; Rui Wu 001; Junjun Qiu; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2022)

A Bi-Directional 300-GHz-Band Phased-Array Transceiver in 65-nm CMOS With Outphasing Transmitting Mode and LO Emission Cancellation. - Ibrahim Abdo; Carrel da Gomez; Chun Wang; Kota Hatano; Qi Li; Chenxin Liu; Kiyoshi Yanagisawa; Ashbir Aviat Fadila; Takuya Fujimura; Tsuyoshi Miura; Korkut Kaan Tokgoz; Jian Pang; et al. (IEEE J. Solid State Circuits, 2022)

A 28-GHz Phased-Array Relay Transceiver for 5G Network Using Vector-Summing Backscatter With 24-GHz Wireless Power and LO Transfer. - Michihiro Ide; Atsushi Shirane; Kiyoshi Yanagisawa; Dongwon You; Jian Pang; Kenichi Okada 001 (IEEE J. Solid State Circuits, 2022)

A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal. - Yun Wang 008; Dongwon You; Xi Fu; Takeshi Nakamura; Ashbir Aviat Fadila; Teruki Someya; Atsuhiro Kawaguchi; Junjun Qiu; Jian Pang; Kiyoshi Yanagisawa; Bangan Liu; Yuncheng Zhang; et al. (IEEE J. Solid State Circuits, 2022)

A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24-71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR. - Yi Zhang 092; Jian Pang; Zheng Li 021; Minzhe Tang; Yijing Liao; Ashbir Aviat Fadila; Atsushi Shirane; Kenichi Okada 001 (IEEE J. Solid State Circuits, 2022)

An 8.5-dB Insertion Loss and 0.8° RMS Phase Error Ka-Band CMOS Hybrid Phase Shifter Featuring Nonuniform Matching for Satellite Communication. - Xi Fu; Yun Wang 008; Xiaolin Wang; Xiaofan Gu; Xueting Luo; Zheng Li 021; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2022)

A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference. - Dingxin Xu; Yuncheng Zhang; Hongye Huang; Zheng Sun 001; Bangan Liu; Ashbir Aviat Fadila; Junjun Qiu; Zezheng Liu; Wenqian Wang; Yuang Xiong; Waleed Madany; Atsushi Shirane; et al. (CICC, 2023)

A 24-49-GHz CMOS Area-Efficient Phase-Invariant Mixed-Type Attenuator With Capacitive Compensation for 5G New Radio. - Zheng Li 021; Peng Luo; Jian Pang; Qiaoyu Wang; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2023)

A Dual-Mode Bi-Directional CMOS Mixer Using Push-Push Doubler for 300GHz-Band Transceivers. - Chenxin Liu; Ibrahim Abdo; Chun Wang; Hiroyuki Sakai 009; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2023)

A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation Path. - Waleed Madany; Yuncheng Zhang; Ashbir Aviat Fadila; Hongye Huang; Junjun Qiu; Atsushi Shirane; Kenichi Okada 001 (ESSCIRC, 2023)

A 60-GHz Transformer-Based Power Amplifier Supporting 5G n263-band Applications. - Junqing Liu; Zheng Li 021; Minghao Fan; Yilun Chen; Atsushi Shirane; Kenichi Okada 001 (ICICDT, 2023)

A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite Constellation. - Xi Fu; Dongwon You; Xiaolin Wang; Michihiro Ide; Yuncheng Zhang; Jun Sakamaki; Ashbir Aviat Fadila; Zheng Li 021; Yun Wang 008; Jumpei Sudo; Makoto Higaki; Soichiro Inoue; et al. (ISSCC, 2023)

A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain Calibration. - Junjun Qiu; Wenqian Wang; Zheng Sun 001; Bangan Liu; Yuncheng Zhang; Dingxin Xu; Hongye Huang; Ashbir Aviat Fadila; Zezheng Liu; Waleed Madany; Yuang Xiong; Atsushi Shirane; et al. (ISSCC, 2023)

A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler. - Dongwon You; Xi Fu; Xiaolin Wang; Yuan Gao; Wenqian Wang; Jun Sakamaki; Hans Herdian; Sena Kato; Michihiro Ide; Yuncheng Zhang; Ashbir Aviat Fadila; Zheng Li 021; et al. (ISSCC, 2023)

A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough Suppression. - Chun Wang; Ibrahim Abdo; Chenxin Liu; Carrel da Gomez; Hans Herdian; Wenqian Wang; Xi Fu; Dongwon You; Abanob Shehata; Sunghwan Park; Yun Wang 008; Jian Pang; et al. (VLSI Technology and Circuits, 2023)

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlter. - Yuncheng Zhang; Zheng Sun 001; Bangan Liu; Junjun Qiu; Dingxin Xu; Yi Zhang 092; Xi Fu; Dongwon You; Hongye Huang; Waleed Madany; Ashbir Aviat Fadila; Zezheng Liu; et al. (VLSI Technology and Circuits, 2023)

A Ka-Band Deployable Active Phased Array Transmitter Fabricated on 4-Layer Liquid Crystal Polymer Substrate for Small-Satellite Mount. - Dongwon You; Xiaolin Wang; Hans Herdian; Xi Fu; Hojun Lee; Michihiro Ide; Carrel da Gomez; Zheng Li 021; Jill C. Mayeda; Daisuke Awaji; Jian Pang; Hiraku Sakamoto; et al. (IEEE Access, 2023)

A 41-GHz 19.4-dBm Psat CMOS Doherty power amplifier for 5G NR applications. - Zheng Li 021; Zixin Chen; Qiaoyu Wang; Junqing Liu; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (IEICE Electron. Express, 2023)

A 39-GHz CMOS Bidirectional Doherty Phased- Array Beamformer Using Shared-LUT DPD With Inter-Element Mismatch Compensation Technique for 5G Base Station. - Zheng Li 021; Jian Pang; Yi Zhang 092; Yudai Yamazaki; Qiaoyu Wang; Peng Luo; Weichu Chen; Yijing Liao; Minzhe Tang; Yun Wang 008; Xi Fu; Dongwon You; et al. (IEEE J. Solid State Circuits, 2023)

A 28GHz High-Accuracy Phase and Amplitude Detection Circuit for Dual-Polarized Phased-Array Calibration. - Yudai Yamazaki; Joshua Alvin; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (IEICE Trans. Electron., 2023)

A 37-43.5-GHz Phase and Amplitude Detection Circuit With 0.049° and 0.036-dB Accuracy for 5G Phased-Array Calibration Using Transformer-Based Injection-Enhanced ILFD. - Yudai Yamazaki; Jun Sakamaki; Jian Pang; Joshua Alvin; Zheng Li 021; Dongwon You; Jill C. Mayeda; Atsushi Shirane; Kenichi Okada 001 (IEEE J. Solid State Circuits, 2023)

A Low-Power 256-Element Ka-Band CMOS Phased-Array Receiver With On-Chip Distributed Radiation Sensors for Small Satellite Constellations. - Xi Fu; Dongwon You; Xiaolin Wang; Yun Wang 008; Carolyn Jill Mayeda; Yuan Gao; Michihiro Ide; Yuncheng Zhang; Jun Sakamaki; Ashbir Aviat Fadila; Zheng Li 021; Jumpei Sudo; et al. (IEEE J. Solid State Circuits, 2023)

35-60GHz Switchless IF Bi-Directional Amplifier Using 65nm CMOS for 300GHz-Band Transceivers. - Abanob Shehata; Hans Herdian; Chun Wang; Chenxin Liu; Kazuaki Kunihiro; Hiroyuki Sakai 009; Atsushi Shirane; Kenichi Okada 001 (A-SSCC, 2024)

A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS. - Takaya Uchino; Yudai Yamazaki; Sunghwan Park; Chenxin Liu; Anyi Tian; Abanob Shehata; Hiroyuki Sakai 009; Kazuaki Kunihiro; Atsushi Shirane; Kenichi Okada 001 (A-SSCC, 2024)

300-GHz-Band InP HBT Power Amplifier and InP-CMOS Hybrid Phased-Array Transmitter. - Teruo Jyo; Ibrahim Abdo; Hiroshi Hamada; Munehiko Nagatani; Adam Pander; Hitoshi Wakita; Miwa Mutoh; Yuta Shiratori; Daisuke Kitayama; Carrel da Gomez; Chun Wang; Kota Hatano; et al. (BCICTS, 2024)

A 24-71-GHz Tri-Mode Mixer Using Harmonic Selection for Multi-Band 5G NR. - Dongfan Xu; Minzhe Tang; Yi Zhang 092; Zheng Li 021; Atsushi Shirane; Kenichi Okada 001 (ISCAS, 2024)

No Victim Left Behind: Developing a Dual-Use LEO Satellite System for Real-Time Population Mapping and Everyday Connectivity. - Takumi Ohashi; Futo Noda; Takashi Tomura; Ampan Laosunthara; Koudai Suzuki; Yuno Tanaka; Maki Kishimoto; Rie Seto; Hiraku Sakamoto; Gia Khanh Tran; Atsushi Shirane (ISCIT, 2024)

24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS. - Chun Wang; Hans Herdian; Wenbin Zheng; Chenxin Liu; Jill C. Mayeda; Yuxuan Liu; Olivia Angel Yong; Wenqian Wang; Yuncheng Zhang; Carrel da Gomez; Abanob Shehata; Sena Kato; et al. (ISSCC, 2024)

10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter. - Dingxin Xu; Zezheng Liu; Yifeng Kuai; Hongye Huang; Yuncheng Zhang; Zheng Sun 001; Bangan Liu; Wenqian Wang; Yuang Xiong; Junjun Qiu; Waleed Madany; Yi Zhang 092; et al. (ISSCC, 2024)

A 28GHz 5G NR Wirelessly Powered Relay Transceiver Using Rectifier-Type 4th-Order Sub-Harmonic Mixer. - Sena Kato; Shu Date; Tao Ruoxin; Yasuto Narukiyo; Hiroki Hayashi; Keito Yuasa; Michihiro Ide; Takashi Tomura; Kenichi Okada 001; Atsushi Shirane (VLSI Technology and Circuits, 2024)

A 640-Gb/s 4×4-MIMO D-Band CMOS Transceiver Chipset. - Chenxin Liu; Zheng Li 021; Yudai Yamazaki; Hans Herdian; Chun Wang; Anyi Tian; Jun Sakamaki; Han Nie; Xi Fu; Sena Kato; Wenqian Wang; Hongye Huang; et al. (VLSI Technology and Circuits, 2024)

A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond. - Yi Zhang 092; Minzhe Tang; Jian Pang; Zheng Li 021; Dongfan Xu; Dingxin Xu; Yuncheng Zhang; Kazuaki Kunihiro; Hiroyuki Sakai 009; Atsushi Shirane; Kenichi Okada 001 (VLSI Technology and Circuits, 2024)

A synthesizable spread spectrum clock generator based on type-II/III fractional-N DPLL. - Waleed Madany; Hongye Huang; Bangan Liu; Ashbir Aviat Fadila; Zezheng Liu; Wenqian Wang; Junjun Qiu; Jill C. Mayeda; Atsushi Shirane; Kenichi Okada 001 (IEICE Electron. Express, 2024)

Millimeter-Wave Transceiver Utilizing On-Chip Butler Matrix for Simultaneous 5G Relay Communication and Wireless Power Transfer. - Keito Yuasa; Michihiro Ide; Sena Kato; Kenichi Okada 001; Atsushi Shirane (IEICE Trans. Electron., 2024)

A Low-Power Radiation-Hardened Ka-Band CMOS Phased-Array Receiver for Small Satellite Constellation. - Xi Fu; Dongwon You; Yun Wang 008; Xiaolin Wang; Ashbir Aviat Fadila; Chenxin Liu; Sena Kato; Chun Wang; Zheng Li 021; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (IEEE J. Solid State Circuits, 2024)

A Sub-THz Full-Duplex Phased-Array Transceiver With Self-Interference Cancellation and LO Feedthrough Suppression. - Chun Wang; Ibrahim Abdo; Chenxin Liu; Carrel da Gomez; Jill C. Mayeda; Hans Herdian; Wenqian Wang; Xi Fu; Dongwon You; Abanob Shehata; Sunghwan Park; Yun Wang 008; et al. (IEEE J. Solid State Circuits, 2024)

A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter. - Yuncheng Zhang; Zheng Sun 001; Bangan Liu; Junjun Qiu; Dingxin Xu; Yi Zhang 092; Xi Fu; Dongwon You; Hongye Huang; Waleed Madany; Ashbir Aviat Fadila; Zezheng Liu; et al. (IEEE J. Solid State Circuits, 2024)

A D-Band CMOS Transceiver Chipset Supporting 640Gb/s Date Rate with 4?4 Line-of-Sight MIMO. - Chenxin Liu; Zheng Li 021; Yudai Yamazaki; Hans Herdian; Chun Wang; Anyi Tian; Jun Sakamaki; Han Nie; Xi Fu; Sena Kato; Wenqian Wang; Hongye Huang; et al. (ASP-DAC, 2025)

A Tri-Mode Harmonic-Selection Mixer with Multiphase LO Supporting 24.25-71GHz for Multi-Band 5G NR. - Dongfan Xu; Minzhe Tang; Yi Zhang 092; Zheng Li 021; Jian Pang; Atsushi Shirane; Kenichi Okada 001 (ASP-DAC, 2025)

A 4-Stream 8-Element Time-Division MIMO Phased-Array Receiver for 5G NR and Beyond Achieving 9.6Gbps Data Rate. - Yi Zhang 092; Minzhe Tang; Zheng Li 021; Dongfan Xu; Kazuaki Kunihiro; Hiroyuki Sakai 009; Atsushi Shirane; Kenichi Okada 001 (ASP-DAC, 2025)

A 6.65-to-7.75GHz Fractional-N Digital PLL with Analog Pre-Distortion DTC Implementing 2nd/3rd-Order Calibration and Achieving -65.7dBc Fractional Spur and 154fs Integrated Jitter. - Daxu Zhang; Dingxin Xu; Hongye Huang; Waleed Madany; Zezheng Liu; Wenqian Wang; Yuang Xiong; Ashbir Aviat Fadila; Duo Li; Yuncheng Zhang; Atsushi Shirane; Kenichi Okada 001 (CICC, 2025)

11.1 A 256-Element Ka-Band CMOS Phased-Array Receiver Using Switch-Type Quadrature-Hybrid-First Architecture for Small Satellite Constellations. - Sena Kato; Jill C. Mayeda; Keito Yuasa; Michihiro Ide; Takeshi Ota; Shu Date; Yudai Yamazaki; Xiaolin Wang; Xi Fu; Dongwon You; Makoto Higaki; Jumpei Sudo; et al. (ISSCC, 2025)

5.6 A Power-Efficient CORDIC-Less Digital Polar Transmitter Using 1b DSM-Based PA Supporting 256-QAM. - Yuncheng Zhang; Zezheng Liu; Duo Li; Minzhe Tang; Yi Zhang 092; Hongye Huang; Dingxin Xu; Waleed Madany; Ashbir Aviat Fadila; Wenqian Wang; Yuang Xiong; Daxu Zhang; et al. (ISSCC, 2025)

Millimeter-wave GaAs Rectifier with Differential Signal 4:1 Power Combiner for Simultaneous Wireless Information and Power Transmission. - Masayuki Kikuchi; Michihiro Ide; Jill C. Mayeda; Sena Kato; Keito Yuasa; Kenichi Okada 001; Atsushi Shirane (LASCAS, 2025)

NLJM: A Simplified Jitter Model of Digital Standard Cells for Rapid Automatic Design of Frequency Synthesizers. - Hongye Huang; Ashbir Aviat Fadila; Dingxin Xu; Waleed Madany; Wenqian Wang; Zezheng Liu; Yuang Xiong; Tianshi Hu; Bangan Liu; Yuncheng Zhang; Atsushi Shirane; Kenichi Okada 001 (IEEE Access, 2025)

A 0.8-1.4-GHz Synthesizable DPLL Using a Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation. - Waleed Madany; Yuncheng Zhang; Ashbir Aviat Fadila; Hongye Huang; Junjun Qiu; Jill C. Mayeda; Atsushi Shirane; Kenichi Okada 001 (IEEE Access, 2025)

A LEO Satellite Mounted 256-Element 19 GHz CMOS Phased-Array Transmitter With On-Chip Amplitude and Phase Monitor. - Xiaolin Wang; Dongwon You; Xi Fu; Gao Yuan; Takeshi Ota; Jill C. Mayeda; Jun Sakamaki; Ashbir Aviat Fadila; Makoto Higaki; Jumpei Sudo; Hiroshi Takizawa; Masashi Shirakura; et al. (IEEE Access, 2025)

A 2.5 dB noise figure 28 GHz current-reused noise-cancelling LNA with gm-boosting in 65 nm CMOS for millimeter-wave MIMO applications. - Yi Zhang 092; Minzhe Tang; Dongfan Xu; Jian Pang; Hiroyuki Sakai 009; Kazuaki Kunihiro; Atsushi Shirane; Kenichi Okada 001 (IEICE Electron. Express, 2025)

A 6.5-to-8-GHz Cascaded Dual-Fractional-N Digital PLL Achieving -52.79-dBc Fractional Spur With 50-MHz Reference. - Dingxin Xu; Yuncheng Zhang; Hongye Huang; Zheng Sun 001; Bangan Liu; Ashbir Aviat Fadila; Junjun Qiu; Zezheng Liu; Wenqian Wang; Yuang Xiong; Waleed Madany; Atsushi Shirane; et al. (IEEE J. Solid State Circuits, 2025)

A 640-Gb/s 4 × 4-MIMO D-Band CMOS Transceiver Chipset. - Chenxin Liu; Zheng Li 021; Yudai Yamazaki; Hans Herdian; Chun Wang; Anyi Tian; Jun Sakamaki; Han Nie; Xi Fu; Sena Kato; Wenqian Wang; Hongye Huang; et al. (IEEE J. Solid State Circuits, 2025)

A DPD/Dither-Free DPLL Based on a Cascaded Fractional Divider and Pseudo-Differential DTCs Achieving a - 62.1-dBc Fractional Spur. - Dingxin Xu; Zezheng Liu; Yifeng Kuai; Hongye Huang; Yuncheng Zhang; Zheng Sun 001; Bangan Liu; Wenqian Wang; Yuang Xiong; Junjun Qiu; Waleed Madany; Yi Zhang 092; et al. (IEEE J. Solid State Circuits, 2025)