Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers. - Johann Hauswald; Michael A. Laurenzano; Yunqi Zhang; Cheng Li; Austin Rovinski; Arjun Khurana; Ronald G. Dreslinski; Trevor N. Mudge; Vinicius Petrucci; Lingjia Tang; Jason Mars (ASPLOS, 2015)

Sirius Implications for Future Warehouse-Scale Computers. - Johann Hauswald; Michael A. Laurenzano; Yunqi Zhang; Cheng Li; Austin Rovinski; Arjun Khurana; Ronald G. Dreslinski; Trevor N. Mudge; Vinicius Petrucci; Lingjia Tang; Jason Mars (IEEE Micro, 2016)

Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant. - Johann Hauswald; Michael A. Laurenzano; Yunqi Zhang; Hailong Yang 002; Yiping Kang; Cheng Li; Austin Rovinski; Arjun Khurana; Ronald G. Dreslinski; Trevor N. Mudge; Vinicius Petrucci; Lingjia Tang; et al. (ACM Trans. Comput. Syst., 2016)

Neurosurgeon: Collaborative Intelligence Between the Cloud and Mobile Edge. - Yiping Kang; Johann Hauswald; Cao Gao; Austin Rovinski; Trevor N. Mudge; Jason Mars; Lingjia Tang (ASPLOS, 2017)

A carbon nanotube transistor based RISC-V processor using pass transistor logic. - Aporva Amarnath; Siying Feng; Subhankar Pal; Tutu Ajayi; Austin Rovinski; Ronald G. Dreslinski (ISLPED, 2017)

The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. - Scott Davidson 004; Shaolin Xie; Christopher Torng; Khalid Al-Hawaj; Austin Rovinski; Tutu Ajayi; Luis Vega; Chun Zhao; Ritchie Zhao; Steve Dai; Aporva Amarnath; Bandhav Veluri; et al. (IEEE Micro, 2018)

A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. - Subhankar Pal; Dong-Hyeon Park; Siying Feng; Paul Gao 001; Jielun Tan; Austin Rovinski; Shaolin Xie; Chun Zhao; Aporva Amarnath; Timothy Wesley; Jonathan Beaumont; Kuan-Yu Chen 001; et al. (VLSI Circuits, 2019)

A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. - Austin Rovinski; Chun Zhao; Khalid Al-Hawaj; Paul Gao 001; Shaolin Xie; Christopher Torng; Scott Davidson 004; Aporva Amarnath; Luis Vega; Bandhav Veluri; Anuj Rao; Tutu Ajayi; et al. (VLSI Circuits, 2019)

Bridging Academic Open-Source EDA to Real-World Usability. - Austin Rovinski; Tutu Ajayi; Minsoo Kim; Guanru Wang; Mehdi Saligane (ICCAD, 2020)

Sparse-TPU: adapting systolic arrays for sparse matrices. - Xin He; Subhankar Pal; Aporva Amarnath; Siying Feng; Dong-Hyeon Park; Austin Rovinski; Haojie Ye; Kuan-Yu Chen 001; Ronald G. Dreslinski; Trevor N. Mudge (ICS, 2020)

A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. - Dong-Hyeon Park; Subhankar Pal; Siying Feng; Paul Gao 001; Jielun Tan; Austin Rovinski; Shaolin Xie; Chun Zhao; Aporva Amarnath; Timothy Wesley; Jonathan Beaumont; Kuan-Yu Chen 001; et al. (IEEE J. Solid State Circuits, 2020)

Towards Free, Open, and Ubiquitous Hardware Design - Austin Rovinski (2022)

Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants. - Vidya A. Chhabria; Bing-Yue Wu; Utsav Sharma; Kishor Kunal; Austin Rovinski; Sachin S. Sapatnekar (ICCAD, 2024)

OpenROAD-Assistant: An Open-Source Large Language Model for Physical Design Tasks. - Utsav Sharma; Bing-Yue Wu; Sai Rahul Dhanvi Kankipati; Vidya A. Chhabria; Austin Rovinski (MLCAD, 2024)

EDA Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD. - Bing-Yue Wu; Utsav Sharma; Sai Rahul Dhanvi Kankipati; Ajay Yadav; Bintu Kappil George; Sai Ritish Guntupalli; Austin Rovinski; Vidya A. Chhabria (CoRR, 2024)

Scaling Co-Packaged Optical Interconnects Using Hybrid 2.5D/3D Integration. - Austin Rovinski; Yanghui Ou; Christine Ou; Devesh Khilwani; Yuyang Wang 003; Songli Wang; Sunwoo Lee 002; Keren Bergman; Alyosha C. Molnar; Christopher Batten (ISCAS, 2025)

Optically Connected Multi-Stack HBM Modules for Large Language Model Training and Inference. - Yanghui Ou; Hengrui Zhang; Austin Rovinski; David Wentzlaff; Christopher Batten (IEEE Comput. Archit. Lett., 2025)